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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 12/14] drm/i915: Remove some useless zeroing on skl+ wm calculations
Date: Thu, 8 Nov 2018 13:46:58 +0200	[thread overview]
Message-ID: <20181108114658.GT9144@intel.com> (raw)
In-Reply-To: <20181107221110.GO2237@intel.com>

On Wed, Nov 07, 2018 at 02:11:10PM -0800, Rodrigo Vivi wrote:
> 
> On Thu, Nov 01, 2018 at 05:06:03PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > We memset(0) the entire watermark struct the start, so there's no
> > need to clear things later on.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 20 +++++---------------
> >  1 file changed, 5 insertions(+), 15 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index bd5f16bc7e08..b0720994fa0a 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4706,10 +4706,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
> >  	if (latency == 0)
> >  		return level == 0 ? -EINVAL : 0;
> >  
> > -	if (!intel_wm_plane_visible(cstate, intel_pstate)) {
> > -		result->plane_en = false;
> > +	if (!intel_wm_plane_visible(cstate, intel_pstate))
> >  		return 0;
> > -	}
> >  
> >  	/* Display WA #1141: kbl,cfl */
> >  	if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
> > @@ -4806,8 +4804,6 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
> >  	if ((level > 0 && res_lines > 31) ||
> >  	    res_blocks >= ddb_allocation ||
> >  	    min_disp_buf_needed >= ddb_allocation) {
> > -		result->plane_en = false;
> > -
> >  		/*
> >  		 * If there are no valid level 0 watermarks, then we can't
> >  		 * support this display configuration.
> > @@ -4831,10 +4827,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
> >  	 */
> >  	if (wp->is_planar && level >= 1 &&
> >  	    (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
> > -	     IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) {
> > -		result->plane_en = false;
> > +	     IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0)))
> 
> this reminds me that I probably forgot one patch behind somewhere...

Nah. You just reviewed the old version here :)

> 
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> 
> >  		return 0;
> > -	}
> >  
> >  	/* The number of lines are ignored for the level 0 watermark. */
> >  	result->plane_res_b = res_blocks;
> > @@ -4920,15 +4914,15 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
> >  	uint16_t wm0_sel_res_b, trans_offset_b, res_blocks;
> >  
> >  	if (!cstate->base.active)
> > -		goto exit;
> > +		return;
> >  
> >  	/* Transition WM are not recommended by HW team for GEN9 */
> >  	if (INTEL_GEN(dev_priv) <= 9)
> > -		goto exit;
> > +		return;
> >  
> >  	/* Transition WM don't make any sense if ipc is disabled */
> >  	if (!dev_priv->ipc_enabled)
> > -		goto exit;
> > +		return;
> >  
> >  	trans_min = 14;
> >  	if (INTEL_GEN(dev_priv) >= 11)
> > @@ -4967,11 +4961,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
> >  	if (res_blocks < ddb_allocation) {
> >  		trans_wm->plane_res_b = res_blocks;
> >  		trans_wm->plane_en = true;
> > -		return;
> >  	}
> > -
> > -exit:
> > -	trans_wm->plane_en = false;
> >  }
> >  
> >  static int __skl_build_plane_wm_single(struct skl_ddb_allocation *ddb,
> > -- 
> > 2.18.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-11-08 11:47 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-01 15:05 [PATCH 00/14] drm/i915: Program SKL+ watermarks/ddb more carefully Ville Syrjala
2018-11-01 15:05 ` [PATCH 01/14] drm/i915: Nuke posting reads from plane update/disable funcs Ville Syrjala
2018-11-01 18:08   ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 02/14] drm/i915: Clean up skl_program_scaler() Ville Syrjala
2018-11-01 15:17   ` [PATCH v2 " Ville Syrjala
2018-11-01 18:13     ` Rodrigo Vivi
2018-11-07 18:29       ` Ville Syrjälä
2018-11-09 17:24         ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 03/14] drm/i915: Remove the PS_PWR_GATE write from skl_program_scaler() Ville Syrjala
2018-11-07 18:53   ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 04/14] drm/i915: Polish the skl+ plane keyval/msk/max register setup Ville Syrjala
2018-11-07 18:41   ` [PATCH v2 " Ville Syrjala
2018-11-07 19:55   ` [PATCH " Rodrigo Vivi
2018-11-07 20:56     ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 05/14] drm/i915: Clean up skl+ PLANE_POS vs. scaler handling Ville Syrjala
2018-11-07 19:56   ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 06/14] drm/i915: Reorganize plane register writes to make them more atomic Ville Syrjala
2018-11-07 18:42   ` [PATCH v2 " Ville Syrjala
2018-11-08 19:30     ` Matt Roper
2018-11-08 19:48       ` Ville Syrjälä
2018-11-07 21:26   ` [PATCH " Rodrigo Vivi
2018-11-07 21:38     ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 07/14] drm/i915: Move single buffered plane register writes to the end Ville Syrjala
2018-11-07 21:26   ` Rodrigo Vivi
2018-11-08 22:06   ` Matt Roper
2018-11-09 13:55     ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 08/14] drm/i915: Generalize skl_ddb_allocation_overlaps() Ville Syrjala
2018-11-07 21:28   ` Rodrigo Vivi
2018-11-01 15:06 ` [PATCH 09/14] drm/i915: Introduce crtc_state->update_planes bitmask Ville Syrjala
2018-11-07 21:49   ` Rodrigo Vivi
2018-11-08 11:32     ` Ville Syrjälä
2018-11-08 23:22   ` Matt Roper
2018-11-09 13:57     ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 10/14] drm/i915: Pass the new crtc_state to ->disable_plane() Ville Syrjala
2018-11-07 22:08   ` Rodrigo Vivi
2018-11-08 11:43     ` Ville Syrjälä
2018-11-08 23:52   ` Matt Roper
2018-11-09 14:32     ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 11/14] drm/i915: Fix latency==0 handling for level 0 watermark on skl+ Ville Syrjala
2018-11-07 22:09   ` Rodrigo Vivi
2018-11-09  0:01   ` Matt Roper
2018-11-09 14:34     ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 12/14] drm/i915: Remove some useless zeroing on skl+ wm calculations Ville Syrjala
2018-11-07 18:43   ` [PATCH v2 " Ville Syrjala
2018-11-07 22:11   ` [PATCH " Rodrigo Vivi
2018-11-08 11:46     ` Ville Syrjälä [this message]
2018-11-01 15:06 ` [PATCH 13/14] drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+ Ville Syrjala
2018-11-07 18:44   ` [PATCH v2 " Ville Syrjala
2018-11-09  1:38     ` Matt Roper
2018-11-09 14:53       ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 14/14] drm/i915: Commit skl+ planes in an order that avoids ddb overlaps Ville Syrjala
2018-11-01 15:08 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully Patchwork
2018-11-01 16:04 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Program SKL+ watermarks/ddb more carefully (rev2) Patchwork
2018-11-01 16:09 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-01 16:26 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-01 18:13 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-07 19:01 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully (rev6) Patchwork

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