From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 07/14] drm/i915: Move single buffered plane register writes to the end
Date: Wed, 7 Nov 2018 13:26:47 -0800 [thread overview]
Message-ID: <20181107212647.GJ2237@intel.com> (raw)
In-Reply-To: <20181101150605.18235-8-ville.syrjala@linux.intel.com>
On Thu, Nov 01, 2018 at 05:05:58PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The plane color correction registers are single buffered. So
> ideally we would write them at the start of vblank just after the
> double buffered plane registers have been latched. Since we have
> no convenient way to do that for now let's at least move the
> single buffered register writes to happen after the double
> buffered registers have been written.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 455b2d0cbaa6..84c5f532fba5 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -718,8 +718,6 @@ vlv_update_plane(struct intel_plane *plane,
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> - vlv_update_clrc(plane_state);
> -
> I915_WRITE_FW(SPSTRIDE(pipe, plane_id),
> plane_state->color_plane[0].stride);
> I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x);
> @@ -747,6 +745,8 @@ vlv_update_plane(struct intel_plane *plane,
> I915_WRITE_FW(SPSURF(pipe, plane_id),
> intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
>
> + vlv_update_clrc(plane_state);
> +
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> --
> 2.18.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-11-07 21:26 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-01 15:05 [PATCH 00/14] drm/i915: Program SKL+ watermarks/ddb more carefully Ville Syrjala
2018-11-01 15:05 ` [PATCH 01/14] drm/i915: Nuke posting reads from plane update/disable funcs Ville Syrjala
2018-11-01 18:08 ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 02/14] drm/i915: Clean up skl_program_scaler() Ville Syrjala
2018-11-01 15:17 ` [PATCH v2 " Ville Syrjala
2018-11-01 18:13 ` Rodrigo Vivi
2018-11-07 18:29 ` Ville Syrjälä
2018-11-09 17:24 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 03/14] drm/i915: Remove the PS_PWR_GATE write from skl_program_scaler() Ville Syrjala
2018-11-07 18:53 ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 04/14] drm/i915: Polish the skl+ plane keyval/msk/max register setup Ville Syrjala
2018-11-07 18:41 ` [PATCH v2 " Ville Syrjala
2018-11-07 19:55 ` [PATCH " Rodrigo Vivi
2018-11-07 20:56 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 05/14] drm/i915: Clean up skl+ PLANE_POS vs. scaler handling Ville Syrjala
2018-11-07 19:56 ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 06/14] drm/i915: Reorganize plane register writes to make them more atomic Ville Syrjala
2018-11-07 18:42 ` [PATCH v2 " Ville Syrjala
2018-11-08 19:30 ` Matt Roper
2018-11-08 19:48 ` Ville Syrjälä
2018-11-07 21:26 ` [PATCH " Rodrigo Vivi
2018-11-07 21:38 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 07/14] drm/i915: Move single buffered plane register writes to the end Ville Syrjala
2018-11-07 21:26 ` Rodrigo Vivi [this message]
2018-11-08 22:06 ` Matt Roper
2018-11-09 13:55 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 08/14] drm/i915: Generalize skl_ddb_allocation_overlaps() Ville Syrjala
2018-11-07 21:28 ` Rodrigo Vivi
2018-11-01 15:06 ` [PATCH 09/14] drm/i915: Introduce crtc_state->update_planes bitmask Ville Syrjala
2018-11-07 21:49 ` Rodrigo Vivi
2018-11-08 11:32 ` Ville Syrjälä
2018-11-08 23:22 ` Matt Roper
2018-11-09 13:57 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 10/14] drm/i915: Pass the new crtc_state to ->disable_plane() Ville Syrjala
2018-11-07 22:08 ` Rodrigo Vivi
2018-11-08 11:43 ` Ville Syrjälä
2018-11-08 23:52 ` Matt Roper
2018-11-09 14:32 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 11/14] drm/i915: Fix latency==0 handling for level 0 watermark on skl+ Ville Syrjala
2018-11-07 22:09 ` Rodrigo Vivi
2018-11-09 0:01 ` Matt Roper
2018-11-09 14:34 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 12/14] drm/i915: Remove some useless zeroing on skl+ wm calculations Ville Syrjala
2018-11-07 18:43 ` [PATCH v2 " Ville Syrjala
2018-11-07 22:11 ` [PATCH " Rodrigo Vivi
2018-11-08 11:46 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 13/14] drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+ Ville Syrjala
2018-11-07 18:44 ` [PATCH v2 " Ville Syrjala
2018-11-09 1:38 ` Matt Roper
2018-11-09 14:53 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 14/14] drm/i915: Commit skl+ planes in an order that avoids ddb overlaps Ville Syrjala
2018-11-01 15:08 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully Patchwork
2018-11-01 16:04 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Program SKL+ watermarks/ddb more carefully (rev2) Patchwork
2018-11-01 16:09 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-01 16:26 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-01 18:13 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-07 19:01 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully (rev6) Patchwork
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