From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/14] drm/i915: Generalize skl_ddb_allocation_overlaps()
Date: Wed, 7 Nov 2018 13:28:52 -0800 [thread overview]
Message-ID: <20181107212852.GK2237@intel.com> (raw)
In-Reply-To: <20181101150605.18235-9-ville.syrjala@linux.intel.com>
On Thu, Nov 01, 2018 at 05:05:59PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make skl_ddb_allocation_overlaps() useful for other callers
> besides skl_update_crtcs(). We'll need it to do plane updates
> as well.
>
> And while we're here we can reduce the stack utilization a
> bit by noting that each struct skl_ddb_entry is 4 bytes whereas
> a pointer to one is 8 bytes (on 64bit). So we'll switch to an
> array of structs from the array of pointers we used before.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 12 +++++-------
> drivers/gpu/drm/i915/intel_drv.h | 7 +++----
> drivers/gpu/drm/i915/intel_pm.c | 15 +++++++--------
> 3 files changed, 15 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 9521cff5fb44..852b5897e80b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12678,13 +12678,12 @@ static void skl_update_crtcs(struct drm_atomic_state *state)
> int i;
> u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices;
> u8 required_slices = intel_state->wm_results.ddb.enabled_slices;
> -
> - const struct skl_ddb_entry *entries[I915_MAX_PIPES] = {};
> + struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
>
> for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i)
> /* ignore allocations for crtc's that have been turned off. */
> if (new_crtc_state->active)
> - entries[i] = &to_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
> + entries[i] = to_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
>
> /* If 2nd DBuf slice required, enable it here */
> if (INTEL_GEN(dev_priv) >= 11 && required_slices > hw_enabled_slices)
> @@ -12710,14 +12709,13 @@ static void skl_update_crtcs(struct drm_atomic_state *state)
> if (updated & cmask || !cstate->base.active)
> continue;
>
> - if (skl_ddb_allocation_overlaps(dev_priv,
> + if (skl_ddb_allocation_overlaps(&cstate->wm.skl.ddb,
> entries,
> - &cstate->wm.skl.ddb,
> - i))
> + INTEL_INFO(dev_priv)->num_pipes, i))
> continue;
>
> updated |= cmask;
> - entries[i] = &cstate->wm.skl.ddb;
> + entries[i] = cstate->wm.skl.ddb;
>
> /*
> * If this is an already active pipe, it's DDB changed,
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index c5acc5f0d518..5331bbed5e8c 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -2182,10 +2182,9 @@ int intel_enable_sagv(struct drm_i915_private *dev_priv);
> int intel_disable_sagv(struct drm_i915_private *dev_priv);
> bool skl_wm_level_equals(const struct skl_wm_level *l1,
> const struct skl_wm_level *l2);
> -bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
> - const struct skl_ddb_entry **entries,
> - const struct skl_ddb_entry *ddb,
> - int ignore);
> +bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
> + const struct skl_ddb_entry entries[],
> + int num_entries, int ignore_idx);
> bool ilk_disable_lp_wm(struct drm_device *dev);
> int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
> struct intel_crtc_state *cstate);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 82c82e233154..6fa1634e2db5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5197,16 +5197,15 @@ static inline bool skl_ddb_entries_overlap(const struct skl_ddb_entry *a,
> return a->start < b->end && b->start < a->end;
> }
>
> -bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
> - const struct skl_ddb_entry **entries,
> - const struct skl_ddb_entry *ddb,
> - int ignore)
> +bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
> + const struct skl_ddb_entry entries[],
> + int num_entries, int ignore_idx)
> {
> - enum pipe pipe;
> + int i;
>
> - for_each_pipe(dev_priv, pipe) {
> - if (pipe != ignore && entries[pipe] &&
> - skl_ddb_entries_overlap(ddb, entries[pipe]))
> + for (i = 0; i < num_entries; i++) {
> + if (i != ignore_idx &&
> + skl_ddb_entries_overlap(ddb, &entries[i]))
> return true;
> }
>
> --
> 2.18.1
>
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next prev parent reply other threads:[~2018-11-07 21:28 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-01 15:05 [PATCH 00/14] drm/i915: Program SKL+ watermarks/ddb more carefully Ville Syrjala
2018-11-01 15:05 ` [PATCH 01/14] drm/i915: Nuke posting reads from plane update/disable funcs Ville Syrjala
2018-11-01 18:08 ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 02/14] drm/i915: Clean up skl_program_scaler() Ville Syrjala
2018-11-01 15:17 ` [PATCH v2 " Ville Syrjala
2018-11-01 18:13 ` Rodrigo Vivi
2018-11-07 18:29 ` Ville Syrjälä
2018-11-09 17:24 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 03/14] drm/i915: Remove the PS_PWR_GATE write from skl_program_scaler() Ville Syrjala
2018-11-07 18:53 ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 04/14] drm/i915: Polish the skl+ plane keyval/msk/max register setup Ville Syrjala
2018-11-07 18:41 ` [PATCH v2 " Ville Syrjala
2018-11-07 19:55 ` [PATCH " Rodrigo Vivi
2018-11-07 20:56 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 05/14] drm/i915: Clean up skl+ PLANE_POS vs. scaler handling Ville Syrjala
2018-11-07 19:56 ` Rodrigo Vivi
2018-11-01 15:05 ` [PATCH 06/14] drm/i915: Reorganize plane register writes to make them more atomic Ville Syrjala
2018-11-07 18:42 ` [PATCH v2 " Ville Syrjala
2018-11-08 19:30 ` Matt Roper
2018-11-08 19:48 ` Ville Syrjälä
2018-11-07 21:26 ` [PATCH " Rodrigo Vivi
2018-11-07 21:38 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 07/14] drm/i915: Move single buffered plane register writes to the end Ville Syrjala
2018-11-07 21:26 ` Rodrigo Vivi
2018-11-08 22:06 ` Matt Roper
2018-11-09 13:55 ` Ville Syrjälä
2018-11-01 15:05 ` [PATCH 08/14] drm/i915: Generalize skl_ddb_allocation_overlaps() Ville Syrjala
2018-11-07 21:28 ` Rodrigo Vivi [this message]
2018-11-01 15:06 ` [PATCH 09/14] drm/i915: Introduce crtc_state->update_planes bitmask Ville Syrjala
2018-11-07 21:49 ` Rodrigo Vivi
2018-11-08 11:32 ` Ville Syrjälä
2018-11-08 23:22 ` Matt Roper
2018-11-09 13:57 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 10/14] drm/i915: Pass the new crtc_state to ->disable_plane() Ville Syrjala
2018-11-07 22:08 ` Rodrigo Vivi
2018-11-08 11:43 ` Ville Syrjälä
2018-11-08 23:52 ` Matt Roper
2018-11-09 14:32 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 11/14] drm/i915: Fix latency==0 handling for level 0 watermark on skl+ Ville Syrjala
2018-11-07 22:09 ` Rodrigo Vivi
2018-11-09 0:01 ` Matt Roper
2018-11-09 14:34 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 12/14] drm/i915: Remove some useless zeroing on skl+ wm calculations Ville Syrjala
2018-11-07 18:43 ` [PATCH v2 " Ville Syrjala
2018-11-07 22:11 ` [PATCH " Rodrigo Vivi
2018-11-08 11:46 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 13/14] drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+ Ville Syrjala
2018-11-07 18:44 ` [PATCH v2 " Ville Syrjala
2018-11-09 1:38 ` Matt Roper
2018-11-09 14:53 ` Ville Syrjälä
2018-11-01 15:06 ` [PATCH 14/14] drm/i915: Commit skl+ planes in an order that avoids ddb overlaps Ville Syrjala
2018-11-01 15:08 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully Patchwork
2018-11-01 16:04 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Program SKL+ watermarks/ddb more carefully (rev2) Patchwork
2018-11-01 16:09 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-11-01 16:26 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-01 18:13 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-07 19:01 ` ✗ Fi.CI.BAT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully (rev6) Patchwork
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