From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <dave@stgolabs.net>,
<dave.jiang@intel.com>, <alison.schofield@intel.com>,
<ira.weiny@intel.com>, <terry.bowman@amd.com>
Subject: Re: [PATCH 4/9] cxl/port: Move decoder setup before dport creation
Date: Thu, 22 Jan 2026 13:07:55 +0000 [thread overview]
Message-ID: <20260122130755.000016e4@huawei.com> (raw)
In-Reply-To: <20260122033330.1622168-5-dan.j.williams@intel.com>
On Wed, 21 Jan 2026 19:33:25 -0800
Dan Williams <dan.j.williams@intel.com> wrote:
> There are port setup actions that run on first dport arrival, and there are
> setup actions that run per dport.
>
> RAS register setup is a future additional setup action to run per-port
> (once the first dport arrives), and each dport also has RAS registers to
> map.
>
> Before adding that, flip the order of "first dport" and "per-dport"
> actions. This makes allocation symmetric with teardown, "first dport"
> actions unwind after last dport removed. It also allows for using a devres
> group to collect the unrelated decoder, RAS, and dport setup actions into
> one group release action.
>
> The new cxl_port_open_group() collects "first dport" and "per-dport" into
> one group that can be released on any failure. This group's lifetime only
> needs to span the short duration of cxl_port_add_dport() to cleanup all
> potential damage from failing to add a dport. Contrast that to the "dport"
> devres group that is called upon to destruct fully formed dport objects.
>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Trivial stuff only. Took me a while to get my head around the temporary
group usage, but having done so it seems correct to me. I poked the
various paths fairly heavily to be sure they all worked out after
thinking there was a bug due to a misread :(
Either way on suggestions below.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> drivers/cxl/core/port.c | 43 +++++++++++++++++++++++++++++------------
> 1 file changed, 31 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> index f2723bf948e2..f69395ea0c14 100644
> --- a/drivers/cxl/core/port.c
> +++ b/drivers/cxl/core/port.c
> @@ -1650,10 +1650,24 @@ static bool dport_exists(struct cxl_port *port, struct device *dport_dev)
> return false;
> }
>
> -DEFINE_FREE(del_cxl_dport, struct cxl_dport *, if (!IS_ERR_OR_NULL(_T)) del_dport(_T))
> +static void *cxl_port_open_group(struct cxl_port *port)
> +{
> + return devres_open_group(&port->dev, port, GFP_KERNEL);
So only reason you are using port as the ID is so there is just one thing
to pass to the DEFINE_FREE() callback. Fair enough, but...
> +}
> +
> +/* note this implicitly casts @port_group back to its @port */
> +DEFINE_FREE(cxl_port_release_group, struct cxl_port *,
> + if (_T) devres_release_group(&_T->dev, _T))
> +
> +static void cxl_port_remove_group(struct cxl_port *port, void *port_group)
> +{
> + devres_remove_group(&port->dev, port_group);
To keep this inline with the DEFINE_FREE(), I'd pass in only one parameter.
Can in theory be either of them but to me port_group is more
consistent. Then cast that to get the struct cxl_port *
> +}
> +
> static struct cxl_dport *cxl_port_add_dport(struct cxl_port *port,
> struct device *dport_dev)
> {
> + struct cxl_dport *dport;
> int rc;
>
> device_lock_assert(&port->dev);
> @@ -1664,14 +1678,13 @@ static struct cxl_dport *cxl_port_add_dport(struct cxl_port *port,
> if (!port->dev.driver)
> return ERR_PTR(-ENXIO);
>
> - struct cxl_dport *dport __free(del_cxl_dport) =
> - devm_cxl_add_dport_by_dev(port, dport_dev);
> - if (IS_ERR(dport))
> - return dport;
> -
> - cxl_switch_parse_cdat(dport);
> + /* Temp group for all "first dport" and "per dport" setup actions */
> + void *port_group __free(cxl_port_release_group) =
> + cxl_port_open_group(port);
> + if (!port_group)
> + return ERR_PTR(-ENOMEM);
>
> - if (port->nr_dports == 1) {
> + if (port->nr_dports == 0) {
> /*
> * Some host bridges are known to not have component regsisters
> * available until a root port has trained CXL. Perform that
> @@ -1684,18 +1697,24 @@ static struct cxl_dport *cxl_port_add_dport(struct cxl_port *port,
> rc = devm_cxl_switch_port_decoders_setup(port);
> if (rc)
> return ERR_PTR(rc);
> - dev_dbg(&port->dev, "first dport%d:%s added with decoders\n",
> - dport->port_id, dev_name(dport_dev));
> - return no_free_ptr(dport);
> }
>
> + dport = devm_cxl_add_dport_by_dev(port, dport_dev);
> + if (IS_ERR(dport))
> + return dport;
> +
> + /* This group was only needed for early exit above */
> + cxl_port_remove_group(port, no_free_ptr(port_group));
> +
> + cxl_switch_parse_cdat(dport);
> +
> /* New dport added, update the decoder targets */
> device_for_each_child(&port->dev, dport, update_decoder_targets);
>
> dev_dbg(&port->dev, "dport%d:%s added\n", dport->port_id,
> - return no_free_ptr(dport);
> + return dport;
> }
>
> static struct cxl_dport *devm_cxl_create_port(struct device *ep_dev,
next prev parent reply other threads:[~2026-01-22 13:08 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 3:33 [PATCH 0/9] cxl/port: Unify RAS setup across port types Dan Williams
2026-01-22 3:33 ` [PATCH 1/9] cxl/port: Cleanup handling of the nr_dports 0 -> 1 transition Dan Williams
2026-01-22 11:32 ` Jonathan Cameron
2026-01-22 19:58 ` dan.j.williams
2026-01-22 16:45 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 2/9] cxl/port: Reduce number of @dport variables in cxl_port_add_dport() Dan Williams
2026-01-22 11:39 ` Jonathan Cameron
2026-01-22 20:02 ` dan.j.williams
2026-01-22 16:54 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 3/9] cxl/port: Cleanup dport removal with a devres group Dan Williams
2026-01-22 11:59 ` Jonathan Cameron
2026-01-22 20:43 ` dan.j.williams
2026-01-23 12:14 ` Jonathan Cameron
2026-01-23 12:24 ` Jonathan Cameron
2026-01-30 23:58 ` dan.j.williams
2026-01-22 3:33 ` [PATCH 4/9] cxl/port: Move decoder setup before dport creation Dan Williams
2026-01-22 13:07 ` Jonathan Cameron [this message]
2026-01-22 21:42 ` dan.j.williams
2026-01-22 20:38 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 5/9] cxl/port: Move dport probe operations to a driver event Dan Williams
2026-01-22 14:44 ` Jonathan Cameron
2026-01-22 21:53 ` dan.j.williams
2026-01-22 3:33 ` [PATCH 6/9] cxl/port: Move dport RAS setup to dport add time Dan Williams
2026-01-22 15:00 ` Jonathan Cameron
2026-01-22 21:56 ` dan.j.williams
2026-01-22 21:06 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 7/9] cxl/port: Map CXL Endpoint Port and CXL Switch Port RAS registers Dan Williams
2026-01-22 15:25 ` Jonathan Cameron
2026-01-22 22:11 ` dan.j.williams
2026-01-22 3:33 ` [PATCH 8/9] cxl/port: Move endpoint component register management to cxl_port Dan Williams
2026-01-22 15:27 ` Jonathan Cameron
2026-01-22 21:24 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 9/9] cxl/port: Unify endpoint and switch port lookup Dan Williams
2026-01-22 15:32 ` Jonathan Cameron
2026-01-22 21:24 ` Dave Jiang
2026-01-22 21:42 ` [PATCH 0/9] cxl/port: Unify RAS setup across port types Bowman, Terry
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260122130755.000016e4@huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=alison.schofield@intel.com \
--cc=dan.j.williams@intel.com \
--cc=dave.jiang@intel.com \
--cc=dave@stgolabs.net \
--cc=ira.weiny@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=terry.bowman@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox