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From: Dave Jiang <dave.jiang@intel.com>
To: Dan Williams <dan.j.williams@intel.com>, linux-cxl@vger.kernel.org
Cc: jonathan.cameron@huawei.com, dave@stgolabs.net,
	alison.schofield@intel.com, ira.weiny@intel.com,
	terry.bowman@amd.com
Subject: Re: [PATCH 2/9] cxl/port: Reduce number of @dport variables in cxl_port_add_dport()
Date: Thu, 22 Jan 2026 09:54:01 -0700	[thread overview]
Message-ID: <6190d2f9-d0fc-4051-96eb-87099587b5f4@intel.com> (raw)
In-Reply-To: <20260122033330.1622168-3-dan.j.williams@intel.com>



On 1/21/26 8:33 PM, Dan Williams wrote:
> In preparation for refactoring cxl_port_add_dport() to add RAS register
> setup, cleanup the number of dport variables with a dport_exists() helper.
> 
> Kill the @dport needed to check for duplicates, rename @new_dport to
> @dport.
> 
> Reported-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Closes: http://lore.kernel.org/20260116150119.00003bbd@huawei.com
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>


Reviewed-by: Dave Jiang <dave.jiang@intel.com>

> ---
>  drivers/cxl/core/port.c | 43 +++++++++++++++++++++++++----------------
>  1 file changed, 26 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> index ff899c690d85..1637e97f6805 100644
> --- a/drivers/cxl/core/port.c
> +++ b/drivers/cxl/core/port.c
> @@ -1587,30 +1587,39 @@ static int update_decoder_targets(struct device *dev, void *data)
>  	return 0;
>  }
>  
> +static bool dport_exists(struct cxl_port *port, struct device *dport_dev)
> +{
> +	struct cxl_dport *dport = cxl_find_dport_by_dev(port, dport_dev);
> +
> +	if (dport) {
> +		dev_dbg(&port->dev, "dport%d:%s already exists\n",
> +			dport->port_id, dev_name(dport_dev));
> +		return true;
> +	}
> +
> +	return false;
> +}
> +
>  DEFINE_FREE(del_cxl_dport, struct cxl_dport *, if (!IS_ERR_OR_NULL(_T)) del_dport(_T))
>  static struct cxl_dport *cxl_port_add_dport(struct cxl_port *port,
>  					    struct device *dport_dev)
>  {
> -	struct cxl_dport *dport;
>  	int rc;
>  
>  	device_lock_assert(&port->dev);
> -	if (!port->dev.driver)
> -		return ERR_PTR(-ENXIO);
>  
> -	dport = cxl_find_dport_by_dev(port, dport_dev);
> -	if (dport) {
> -		dev_dbg(&port->dev, "dport%d:%s already exists\n",
> -			dport->port_id, dev_name(dport_dev));
> +	if (dport_exists(port, dport_dev))
>  		return ERR_PTR(-EBUSY);
> -	}
>  
> -	struct cxl_dport *new_dport __free(del_cxl_dport) =
> +	if (!port->dev.driver)
> +		return ERR_PTR(-ENXIO);
> +
> +	struct cxl_dport *dport __free(del_cxl_dport) =
>  		devm_cxl_add_dport_by_dev(port, dport_dev);
> -	if (IS_ERR(new_dport))
> -		return new_dport;
> +	if (IS_ERR(dport))
> +		return dport;
>  
> -	cxl_switch_parse_cdat(new_dport);
> +	cxl_switch_parse_cdat(dport);
>  
>  	if (port->nr_dports == 1) {
>  		/*
> @@ -1626,17 +1635,17 @@ static struct cxl_dport *cxl_port_add_dport(struct cxl_port *port,
>  		if (rc)
>  			return ERR_PTR(rc);
>  		dev_dbg(&port->dev, "first dport%d:%s added with decoders\n",
> -			new_dport->port_id, dev_name(dport_dev));
> -		return no_free_ptr(new_dport);
> +			dport->port_id, dev_name(dport_dev));
> +		return no_free_ptr(dport);
>  	}
>  
>  	/* New dport added, update the decoder targets */
> -	device_for_each_child(&port->dev, new_dport, update_decoder_targets);
> +	device_for_each_child(&port->dev, dport, update_decoder_targets);
>  
> -	dev_dbg(&port->dev, "dport%d:%s added\n", new_dport->port_id,
> +	dev_dbg(&port->dev, "dport%d:%s added\n", dport->port_id,
>  		dev_name(dport_dev));
>  
> -	return no_free_ptr(new_dport);
> +	return no_free_ptr(dport);
>  }
>  
>  static struct cxl_dport *devm_cxl_create_port(struct device *ep_dev,


  parent reply	other threads:[~2026-01-22 16:54 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-22  3:33 [PATCH 0/9] cxl/port: Unify RAS setup across port types Dan Williams
2026-01-22  3:33 ` [PATCH 1/9] cxl/port: Cleanup handling of the nr_dports 0 -> 1 transition Dan Williams
2026-01-22 11:32   ` Jonathan Cameron
2026-01-22 19:58     ` dan.j.williams
2026-01-22 16:45   ` Dave Jiang
2026-01-22  3:33 ` [PATCH 2/9] cxl/port: Reduce number of @dport variables in cxl_port_add_dport() Dan Williams
2026-01-22 11:39   ` Jonathan Cameron
2026-01-22 20:02     ` dan.j.williams
2026-01-22 16:54   ` Dave Jiang [this message]
2026-01-22  3:33 ` [PATCH 3/9] cxl/port: Cleanup dport removal with a devres group Dan Williams
2026-01-22 11:59   ` Jonathan Cameron
2026-01-22 20:43     ` dan.j.williams
2026-01-23 12:14       ` Jonathan Cameron
2026-01-23 12:24         ` Jonathan Cameron
2026-01-30 23:58         ` dan.j.williams
2026-01-22  3:33 ` [PATCH 4/9] cxl/port: Move decoder setup before dport creation Dan Williams
2026-01-22 13:07   ` Jonathan Cameron
2026-01-22 21:42     ` dan.j.williams
2026-01-22 20:38   ` Dave Jiang
2026-01-22  3:33 ` [PATCH 5/9] cxl/port: Move dport probe operations to a driver event Dan Williams
2026-01-22 14:44   ` Jonathan Cameron
2026-01-22 21:53     ` dan.j.williams
2026-01-22  3:33 ` [PATCH 6/9] cxl/port: Move dport RAS setup to dport add time Dan Williams
2026-01-22 15:00   ` Jonathan Cameron
2026-01-22 21:56     ` dan.j.williams
2026-01-22 21:06   ` Dave Jiang
2026-01-22  3:33 ` [PATCH 7/9] cxl/port: Map CXL Endpoint Port and CXL Switch Port RAS registers Dan Williams
2026-01-22 15:25   ` Jonathan Cameron
2026-01-22 22:11     ` dan.j.williams
2026-01-22  3:33 ` [PATCH 8/9] cxl/port: Move endpoint component register management to cxl_port Dan Williams
2026-01-22 15:27   ` Jonathan Cameron
2026-01-22 21:24   ` Dave Jiang
2026-01-22  3:33 ` [PATCH 9/9] cxl/port: Unify endpoint and switch port lookup Dan Williams
2026-01-22 15:32   ` Jonathan Cameron
2026-01-22 21:24   ` Dave Jiang
2026-01-22 21:42 ` [PATCH 0/9] cxl/port: Unify RAS setup across port types Bowman, Terry

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