From: <dan.j.williams@intel.com>
To: Jonathan Cameron <jonathan.cameron@huawei.com>,
Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <dave@stgolabs.net>,
<dave.jiang@intel.com>, <alison.schofield@intel.com>,
<ira.weiny@intel.com>, <terry.bowman@amd.com>
Subject: Re: [PATCH 6/9] cxl/port: Move dport RAS setup to dport add time
Date: Thu, 22 Jan 2026 13:56:08 -0800 [thread overview]
Message-ID: <69729cf8b1f12_309510043@dwillia2-mobl4.notmuch> (raw)
In-Reply-To: <20260122150054.00006604@huawei.com>
Jonathan Cameron wrote:
[..]
> Obviously really applies to earlier patch but maybe it's worth
>
> struct cxl_port *port = &dport->port;
>
> if (is_cxl_root(port))
> return port->uport_dev;
> return port->dev;
>
> I'm not sure it really adds that much but is the sort of thing
> someone will post a patch 'tidying up' later.
Sure, folded.
next prev parent reply other threads:[~2026-01-22 21:56 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 3:33 [PATCH 0/9] cxl/port: Unify RAS setup across port types Dan Williams
2026-01-22 3:33 ` [PATCH 1/9] cxl/port: Cleanup handling of the nr_dports 0 -> 1 transition Dan Williams
2026-01-22 11:32 ` Jonathan Cameron
2026-01-22 19:58 ` dan.j.williams
2026-01-22 16:45 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 2/9] cxl/port: Reduce number of @dport variables in cxl_port_add_dport() Dan Williams
2026-01-22 11:39 ` Jonathan Cameron
2026-01-22 20:02 ` dan.j.williams
2026-01-22 16:54 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 3/9] cxl/port: Cleanup dport removal with a devres group Dan Williams
2026-01-22 11:59 ` Jonathan Cameron
2026-01-22 20:43 ` dan.j.williams
2026-01-23 12:14 ` Jonathan Cameron
2026-01-23 12:24 ` Jonathan Cameron
2026-01-30 23:58 ` dan.j.williams
2026-01-22 3:33 ` [PATCH 4/9] cxl/port: Move decoder setup before dport creation Dan Williams
2026-01-22 13:07 ` Jonathan Cameron
2026-01-22 21:42 ` dan.j.williams
2026-01-22 20:38 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 5/9] cxl/port: Move dport probe operations to a driver event Dan Williams
2026-01-22 14:44 ` Jonathan Cameron
2026-01-22 21:53 ` dan.j.williams
2026-01-22 3:33 ` [PATCH 6/9] cxl/port: Move dport RAS setup to dport add time Dan Williams
2026-01-22 15:00 ` Jonathan Cameron
2026-01-22 21:56 ` dan.j.williams [this message]
2026-01-22 21:06 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 7/9] cxl/port: Map CXL Endpoint Port and CXL Switch Port RAS registers Dan Williams
2026-01-22 15:25 ` Jonathan Cameron
2026-01-22 22:11 ` dan.j.williams
2026-01-22 3:33 ` [PATCH 8/9] cxl/port: Move endpoint component register management to cxl_port Dan Williams
2026-01-22 15:27 ` Jonathan Cameron
2026-01-22 21:24 ` Dave Jiang
2026-01-22 3:33 ` [PATCH 9/9] cxl/port: Unify endpoint and switch port lookup Dan Williams
2026-01-22 15:32 ` Jonathan Cameron
2026-01-22 21:24 ` Dave Jiang
2026-01-22 21:42 ` [PATCH 0/9] cxl/port: Unify RAS setup across port types Bowman, Terry
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