* [PATCH 00/18] Add DT support for CSI2RX multi-stream
@ 2026-07-02 9:31 Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 01/18] arm64: dts: ti: k3-{j721e/j721s2}-main: Fix indentation in CSI2RX node Yemike Abhilash Chandra
` (17 more replies)
0 siblings, 18 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
Driver support for CSI2RX multi-stream was merged last cycle[0]. This
series adds the corresponding device tree support.
Patch 1 is a cleanup fixing indentation in the existing CSI2RX nodes.
The next few patches i.e. (Patch 2 to Patch 6) add the additional DMA
channels required for CSI2RX multi-stream capture.
Multi-stream capture uses a SERDES pair based on the FPD-Link or
V3Link protocol. The serializer takes the input from a camera sensor
and converts it to the FPD-Link standard, while the deserializer
aggregates streams from multiple serializers and sends them over the
CSI-2 RX interface. Each CSI2RX instance therefore indirectly receives
input from multiple sensors.
The remaining patches add overlays for various deserializer boards,
and for the UB953 serializer with the IMX219 sensor. Also enabling
DS90UB960 deserializer and DS90UB953 serializer drivers in the
arm64 defconfig.
Testlogs:
J721E + Fusion application daughter board: https://gist.github.com/Yemike-Abhilash-Chandra/341cea78c93a5849a9b318a5fa1ad5b2
J721S2 + Fusion application daughter board: https://gist.github.com/Yemike-Abhilash-Chandra/e676bda929ae940f9c85e8dd3d03f644
J784s4s + Fusion application daughter board: https://gist.github.com/Yemike-Abhilash-Chandra/e69f077af78468b9e5dfc20b9bdef374
AM68 + Fusion application daughter board: https://gist.github.com/Yemike-Abhilash-Chandra/aa913e3533b227a477d6363c04692474
J721E + DS90UB954-Q1EVM: https://gist.github.com/Yemike-Abhilash-Chandra/f1bfaa7f62b185c492a81659100a9c02
J721S2 + DS90UB954-Q1EVM: https://gist.github.com/Yemike-Abhilash-Chandra/15dda67fffc542d30bcc3a83dd7d5782
J784s4s + J7EXPA01EVM Fusion2: https://gist.github.com/Yemike-Abhilash-Chandra/22a74bae79c1fc7eb92d158fc1ee81b5
AM68 + Arducam V3link: https://gist.github.com/Yemike-Abhilash-Chandra/8188ac234b21406f336032c14c9fa9d4
J722S + Arducam V3link: https://gist.github.com/Yemike-Abhilash-Chandra/24d49bd30ba3a499ff7c93fa4d5cc1ad
(grep for "ds90ub960" for the deserializer logs and "ds90ub953" for the serializer.
grep for "running tests" to see the actual test pattern genertaion capture logs from
the sensor over the SERDES)
dtbs_check: make CONFIG_OF_ALL_DTBS=y dtstree=arch/arm64/boot/dts/ti dtbs_check gives no errors
Branch: https://github.com/Yemike-Abhilash-Chandra/linux/tree/CSI_MT_DT_V3
[0]: https://lore.kernel.org/all/20260520120022.539913-1-r-donadkar@ti.com/
Jianzhong Xu (1):
arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer
Vaishnav Achath (13):
arm64: dts: ti: k3-{j721e/j721s2}-main: Fix indentation in CSI2RX node
arm64: dts: ti: k3-j721e-main: Add multiple channels for CSI2RX DMA
arm64: dts: ti: k3-j721s2-main: Add multiple channels for CSI2RX DMA
arm64: dts: ti: k3-j784s4-j742s2-main-common: Add multiple channels
for CSI2RX DMA
arm64: dts: ti: k3-am62p-j722s: Add multiple channels for CSI2RX DMA
arm64: dts: ti: k3-j722s-main: Add multiple channels for CSI2RX DMA
arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter
board
arm64: dts: ti: k3-j721s2: Add overlay for fusion application daughter
board
arm64: dts: ti: k3-j721e-sk: Add overlay for fusion application
daughter board
arm64: dts: ti: k3-j722s-evm: Add overlay for fusion application
daughter board
arm64: dts: ti: k3-am68-sk: Add overlay for dual Arducam V3link fusion
arm64: dts: ti: k3-j722s-evm: Add overlay for dual Arducam V3link
fusion
arm64: dts: ti: k3-j784s4-evm: Add overlay for J7EXPA01EVM Fusion2
Yemike Abhilash Chandra (4):
arm64: dts: ti: k3-j722s-evm: Add overlay for J7EXPA01EVM Fusion2
arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM
arm64: dts: ti: k3-j721e: Add overlay for DS90UB954-Q1EVM
arm64: defconfig: Enable DS90UB960 deserializer and DS90UB953
serializer
arch/arm64/boot/dts/ti/Makefile | 62 ++++
.../dts/ti/k3-am62p-j722s-common-main.dtsi | 6 +-
.../boot/dts/ti/k3-am68-sk-v3link-fusion.dtso | 204 ++++++++++++
.../boot/dts/ti/k3-j721e-evm-fusion.dtso | 191 +++++++++++
.../arm64/boot/dts/ti/k3-j721e-evm-ub954.dtso | 93 ++++++
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 24 +-
.../dts/ti/k3-j721e-sk-fpdlink-fusion.dtso | 191 +++++++++++
.../boot/dts/ti/k3-j721s2-evm-fusion.dtso | 191 +++++++++++
.../boot/dts/ti/k3-j721s2-evm-ub954.dtso | 93 ++++++
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 22 +-
.../dts/ti/k3-j722s-evm-fpdlink-fusion.dtso | 196 ++++++++++++
.../ti/k3-j722s-evm-fpdlink-iv-fusion.dtso | 296 ++++++++++++++++++
.../dts/ti/k3-j722s-evm-v3link-fusion.dtso | 213 +++++++++++++
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 15 +-
.../ti/k3-j784s4-evm-fpdlink-iv-fusion.dtso | 281 +++++++++++++++++
.../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 21 +-
.../boot/dts/ti/k3-v3link-imx219-0-0.dtso | 127 ++++++++
arch/arm64/configs/defconfig | 2 +
18 files changed, 2200 insertions(+), 28 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-evm-ub954.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-ub954.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-iv-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-v3link-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-fpdlink-iv-fusion.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
--
2.34.1
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 01/18] arm64: dts: ti: k3-{j721e/j721s2}-main: Fix indentation in CSI2RX node
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 02/18] arm64: dts: ti: k3-j721e-main: Add multiple channels for CSI2RX DMA Yemike Abhilash Chandra
` (16 subsequent siblings)
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
Fix a few minor indentation errors in the cdns csi2rx clocks and
clock-names properties.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 ++--
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index d5fd30a01032..5a8414fc5751 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -612,9 +612,9 @@ cdns_csi2rx0: csi-bridge@4504000 {
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 26 2>, <&k3_clks 26 0>, <&k3_clks 26 2>,
- <&k3_clks 26 2>, <&k3_clks 26 3>, <&k3_clks 26 3>;
+ <&k3_clks 26 2>, <&k3_clks 26 3>, <&k3_clks 26 3>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
- "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
phys = <&dphy0>;
phy-names = "dphy";
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 1228ac5711bf..5cac119e4292 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1251,9 +1251,9 @@ cdns_csi2rx0: csi-bridge@4504000 {
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 38 3>, <&k3_clks 38 1>, <&k3_clks 38 3>,
- <&k3_clks 38 3>, <&k3_clks 38 4>, <&k3_clks 38 4>;
+ <&k3_clks 38 3>, <&k3_clks 38 4>, <&k3_clks 38 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
- "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
phys = <&dphy0>;
phy-names = "dphy";
@@ -1307,9 +1307,9 @@ cdns_csi2rx1: csi-bridge@4514000 {
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error_irq", "irq";
clocks = <&k3_clks 39 3>, <&k3_clks 39 1>, <&k3_clks 39 3>,
- <&k3_clks 39 3>, <&k3_clks 39 4>, <&k3_clks 39 4>;
+ <&k3_clks 39 3>, <&k3_clks 39 4>, <&k3_clks 39 4>;
clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
- "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
phys = <&dphy1>;
phy-names = "dphy";
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 02/18] arm64: dts: ti: k3-j721e-main: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 01/18] arm64: dts: ti: k3-{j721e/j721s2}-main: Fix indentation in CSI2RX node Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 03/18] arm64: dts: ti: k3-j721s2-main: " Yemike Abhilash Chandra
` (15 subsequent siblings)
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
J721E CSI2RX SHIM layer can support up to 32 DMA channel contexts. Add
additional DMA channels to enable multistream support for CSI2RX.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 5a8414fc5751..b1988437f52d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -600,8 +600,14 @@ ti_csi2rx0: ticsi2rx@4500000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_udmap 0x4940>;
- dma-names = "rx0";
+ dmas = <&main_udmap 0x4940>, <&main_udmap 0x4941>, <&main_udmap 0x4942>,
+ <&main_udmap 0x4943>, <&main_udmap 0x4944>, <&main_udmap 0x4945>,
+ <&main_udmap 0x4946>, <&main_udmap 0x4947>, <&main_udmap 0x4948>,
+ <&main_udmap 0x4949>, <&main_udmap 0x494a>, <&main_udmap 0x494b>,
+ <&main_udmap 0x494c>, <&main_udmap 0x494d>, <&main_udmap 0x494e>,
+ <&main_udmap 0x494f>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+ "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15";
power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
@@ -656,8 +662,14 @@ ti_csi2rx1: ticsi2rx@4510000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_udmap 0x4960>;
- dma-names = "rx0";
+ dmas = <&main_udmap 0x4960>, <&main_udmap 0x4961>, <&main_udmap 0x4962>,
+ <&main_udmap 0x4963>, <&main_udmap 0x4964>, <&main_udmap 0x4965>,
+ <&main_udmap 0x4966>, <&main_udmap 0x4967>, <&main_udmap 0x4968>,
+ <&main_udmap 0x4969>, <&main_udmap 0x496a>, <&main_udmap 0x496b>,
+ <&main_udmap 0x496c>, <&main_udmap 0x496d>, <&main_udmap 0x496e>,
+ <&main_udmap 0x496f>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
+ "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15";
power-domains = <&k3_pds 27 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 03/18] arm64: dts: ti: k3-j721s2-main: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 01/18] arm64: dts: ti: k3-{j721e/j721s2}-main: Fix indentation in CSI2RX node Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 02/18] arm64: dts: ti: k3-j721e-main: Add multiple channels for CSI2RX DMA Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:55 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 04/18] arm64: dts: ti: k3-j784s4-j742s2-main-common: " Yemike Abhilash Chandra
` (14 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
J721E CSI2RX SHIM layer can support up to 32 DMA channel contexts. Add
additional DMA channels to enable multistream support for CSI2RX.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 5cac119e4292..f4b8713873b1 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1239,8 +1239,11 @@ ti_csi2rx0: ticsi2rx@4500000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x4940 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x4940 0>, <&main_bcdma_csi 0 0x4941 0>,
+ <&main_bcdma_csi 0 0x4942 0>, <&main_bcdma_csi 0 0x4943 0>,
+ <&main_bcdma_csi 0 0x4944 0>, <&main_bcdma_csi 0 0x4945 0>,
+ <&main_bcdma_csi 0 0x4946 0>, <&main_bcdma_csi 0 0x4947 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7";
power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
@@ -1295,8 +1298,11 @@ ti_csi2rx1: ticsi2rx@4510000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x4960 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x4960 0>, <&main_bcdma_csi 0 0x4961 0>,
+ <&main_bcdma_csi 0 0x4962 0>, <&main_bcdma_csi 0 0x4963 0>,
+ <&main_bcdma_csi 0 0x4964 0>, <&main_bcdma_csi 0 0x4965 0>,
+ <&main_bcdma_csi 0 0x4966 0>, <&main_bcdma_csi 0 0x4967 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7";
power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 04/18] arm64: dts: ti: k3-j784s4-j742s2-main-common: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (2 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 03/18] arm64: dts: ti: k3-j721s2-main: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:46 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 05/18] arm64: dts: ti: k3-am62p-j722s: " Yemike Abhilash Chandra
` (13 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
J721E CSI2RX SHIM layer can support up to 32 DMA channel contexts,
Add additional DMA channels to enable multistream support for CSI2RX.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
.../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 21 +++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
index c2636e624f18..4b4545a5af19 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
@@ -811,8 +811,11 @@ ti_csi2rx0: ticsi2rx@4500000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x4940 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x4940 0>, <&main_bcdma_csi 0 0x4941 0>,
+ <&main_bcdma_csi 0 0x4942 0>, <&main_bcdma_csi 0 0x4943 0>,
+ <&main_bcdma_csi 0 0x4944 0>, <&main_bcdma_csi 0 0x4945 0>,
+ <&main_bcdma_csi 0 0x4946 0>, <&main_bcdma_csi 0 0x4947 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7";
power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
@@ -867,8 +870,11 @@ ti_csi2rx1: ticsi2rx@4510000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x4960 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x4960 0>, <&main_bcdma_csi 0 0x4961 0>,
+ <&main_bcdma_csi 0 0x4962 0>, <&main_bcdma_csi 0 0x4963 0>,
+ <&main_bcdma_csi 0 0x4964 0>, <&main_bcdma_csi 0 0x4965 0>,
+ <&main_bcdma_csi 0 0x4966 0>, <&main_bcdma_csi 0 0x4967 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7";
power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
@@ -922,8 +928,11 @@ ti_csi2rx2: ticsi2rx@4520000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x4980 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x4980 0>, <&main_bcdma_csi 0 0x4981 0>,
+ <&main_bcdma_csi 0 0x4982 0>, <&main_bcdma_csi 0 0x4983 0>,
+ <&main_bcdma_csi 0 0x4984 0>, <&main_bcdma_csi 0 0x4985 0>,
+ <&main_bcdma_csi 0 0x4986 0>, <&main_bcdma_csi 0 0x4987 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7";
power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 05/18] arm64: dts: ti: k3-am62p-j722s: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (3 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 04/18] arm64: dts: ti: k3-j784s4-j742s2-main-common: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 06/18] arm64: dts: ti: k3-j722s-main: " Yemike Abhilash Chandra
` (12 subsequent siblings)
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
J721E CSI2RX SHIM layer can support up to 32 DMA channel contexts,
Add additional DMA channels to enable multistream support for CSI2RX.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index f130c7cb998d..ecb537b96fca 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -1053,8 +1053,10 @@ ti_csi2rx0: ticsi2rx@30102000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x5000 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x5000 0>, <&main_bcdma_csi 0 0x5001 0>,
+ <&main_bcdma_csi 0 0x5002 0>, <&main_bcdma_csi 0 0x5003 0>,
+ <&main_bcdma_csi 0 0x5004 0>, <&main_bcdma_csi 0 0x5005 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5";
power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 06/18] arm64: dts: ti: k3-j722s-main: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (4 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 05/18] arm64: dts: ti: k3-am62p-j722s: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:47 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 07/18] arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter board Yemike Abhilash Chandra
` (11 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
J721E CSI2RX SHIM layer can support up to 32 DMA channel contexts,
Add additional DMA channels to enable multistream support for CSI2RX.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Tested-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index d1dbf1e24fbf..98d2090c4c9c 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -173,8 +173,9 @@ ti_csi2rx1: ticsi2rx@30122000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x5100 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x5100 0>, <&main_bcdma_csi 0 0x5101 0>,
+ <&main_bcdma_csi 0 0x5102 0>, <&main_bcdma_csi 0 0x5103 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3";
power-domains = <&k3_pds 247 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
@@ -230,8 +231,9 @@ ti_csi2rx2: ticsi2rx@30142000 {
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
- dmas = <&main_bcdma_csi 0 0x5200 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x5200 0>, <&main_bcdma_csi 0 0x5201 0>,
+ <&main_bcdma_csi 0 0x5202 0>, <&main_bcdma_csi 0 0x5203 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3";
status = "disabled";
cdns_csi2rx2: csi-bridge@30141000 {
@@ -285,8 +287,9 @@ ti_csi2rx3: ticsi2rx@30162000 {
ranges;
#address-cells = <2>;
#size-cells = <2>;
- dmas = <&main_bcdma_csi 0 0x5300 0>;
- dma-names = "rx0";
+ dmas = <&main_bcdma_csi 0 0x5300 0>, <&main_bcdma_csi 0 0x5301 0>,
+ <&main_bcdma_csi 0 0x5302 0>, <&main_bcdma_csi 0 0x5303 0>;
+ dma-names = "rx0", "rx1", "rx2", "rx3";
power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 07/18] arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter board
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (5 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 06/18] arm64: dts: ti: k3-j722s-main: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:47 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 08/18] arm64: dts: ti: k3-j721s2: " Yemike Abhilash Chandra
` (10 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
Fusion application daughter board [1] can be used to connect multiple
FPDLink-III based sensors to TI EVMs. The board has two DS90UB960
deserializers, each of which aggregates input from up to 4x FPDLink-III
sensors. Up to 8x sensors can simultaneously stream over the two CSI RX
ports on J721E.
[1]: https://svtronics.com/product/fusion-application-daughter-board-evm577pfusion-v1-0/?srsltid=AfmBOooMsRAd5ibFOGJaKbjsC3j9-loTPK2wWqsqPq2Adj55g1nPluxX
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 4 +
.../boot/dts/ti/k3-j721e-evm-fusion.dtso | 191 ++++++++++++++++++
2 files changed, 195 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 21db60cd19de..7e2ed5c94e79 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -141,6 +141,7 @@ k3-j721e-evm-gesi-dtbs := k3-j721e-common-proc-board.dtb k3-j721e-evm-gesi-exp-b
dtb-$(CONFIG_ARCH_K3) += k3-j721e-beagleboneai64.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board-infotainment.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-fusion.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-gesi.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-gesi-exp-board.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtbo
@@ -274,6 +275,8 @@ k3-j7200-evm-pcie1-ep-dtbs := k3-j7200-common-proc-board.dtb \
k3-j7200-evm-pcie1-ep.dtbo
k3-j721e-common-proc-board-infotainment-dtbs := k3-j721e-common-proc-board.dtb \
k3-j721e-common-proc-board-infotainment.dtbo
+k3-j721e-evm-fpdlink-fusion-dtbs := k3-j721e-evm.dtb \
+ k3-j721e-evm-fusion.dtbo
k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \
k3-j721e-evm-pcie0-ep.dtbo
k3-j721e-evm-pcie1-ep-dtbs := k3-j721e-common-proc-board.dtb \
@@ -344,6 +347,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-am69-sk-pcie0-ep.dtb \
k3-j7200-evm-pcie1-ep.dtb \
k3-j721e-common-proc-board-infotainment.dtb \
+ k3-j721e-evm-fpdlink-fusion.dtb \
k3-j721e-evm-pcie0-ep.dtb \
k3-j721e-evm-pcie1-ep.dtb \
k3-j721e-sk-csi2-dual-imx219.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso
new file mode 100644
index 000000000000..0df2e48a4089
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for Fusion (FPD-Link III) board on J721E EVM
+ * https://svtronics.com/portfolio/evm577pfusion-v1-0-fusion/
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+
+&main_i2c6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ deser@3d {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x3d>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_0_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@36 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x36>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ deserializer_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_1_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub960_1_csi_out>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 08/18] arm64: dts: ti: k3-j721s2: Add overlay for fusion application daughter board
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (6 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 07/18] arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter board Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:45 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 09/18] arm64: dts: ti: k3-j721e-sk: " Yemike Abhilash Chandra
` (9 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
Fusion application daughter board [1] can be used to connect multiple
FPDLink-III based sensors to TI EVMs. The board has two DS90UB960
deserializers, each of which aggregates input from up to 4x FPDLink-III
sensors. Up to 8x sensors can simultaneously stream over the two CSI RX
ports on J721S2.
CSI2RX connectivity on J784S4 and J742S2 is the same as that of J721S2,
hence the same overlay can be reused.
[1]: https://svtronics.com/product/fusion-application-daughter-board-evm577pfusion-v1-0/?srsltid=AfmBOooMsRAd5ibFOGJaKbjsC3j9-loTPK2wWqsqPq2Adj55g1nPluxX
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 7 +
.../boot/dts/ti/k3-j721s2-evm-fusion.dtso | 191 ++++++++++++++++++
2 files changed, 198 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 7e2ed5c94e79..79ce2ff38cc3 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -160,6 +160,7 @@ k3-am68-phyboard-izar-peb-av-15-dtbs := k3-am68-phyboard-izar.dtb \
dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-fusion.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo
k3-j721s2-evm-dtbs := k3-j721s2-common-proc-board.dtb k3-j721s2-evm-gesi-exp-board.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm.dtb
@@ -283,6 +284,8 @@ k3-j721e-evm-pcie1-ep-dtbs := k3-j721e-common-proc-board.dtb \
k3-j721e-evm-pcie1-ep.dtbo
k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
+k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-evm.dtb \
+ k3-j721s2-evm-fusion.dtbo
k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
k3-j721s2-evm-pcie1-ep.dtbo
k3-j721s2-evm-usb0-type-a-dtbs := k3-j721s2-common-proc-board.dtb \
@@ -293,6 +296,8 @@ k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
k3-j784s4-j742s2-evm-usb0-type-a.dtbo
+k3-j784s4-evm-fpdlink-fusion-dtbs := k3-j784s4-evm.dtb \
+ k3-j721s2-evm-fusion.dtbo
k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \
k3-j784s4-evm-pcie0-pcie1-ep.dtbo
k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \
@@ -351,11 +356,13 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j721e-evm-pcie0-ep.dtb \
k3-j721e-evm-pcie1-ep.dtb \
k3-j721e-sk-csi2-dual-imx219.dtb \
+ k3-j721s2-evm-fpdlink-fusion.dtb \
k3-j721s2-evm-pcie1-ep.dtb \
k3-j721s2-evm-usb0-type-a.dtb \
k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
k3-j742s2-evm-usb0-type-a.dtb \
+ k3-j784s4-evm-fpdlink-fusion.dtb \
k3-j784s4-evm-pcie0-pcie1-ep.dtb \
k3-j784s4-evm-quad-port-eth-exp1.dtb \
k3-j784s4-evm-usb0-type-a.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso
new file mode 100644
index 000000000000..f200cdaa1bab
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for Fusion (FPD-Link III) board on J721S2 and J784S4 EVM
+ * https://svtronics.com/portfolio/evm577pfusion-v1-0-fusion/
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+
+&main_i2c5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ deser@3d {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x3d>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_0_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@36 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x36>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ deserializer_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_1_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub960_1_csi_out>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 09/18] arm64: dts: ti: k3-j721e-sk: Add overlay for fusion application daughter board
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (7 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 08/18] arm64: dts: ti: k3-j721s2: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:50 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 10/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
` (8 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
Fusion application daughter board [1] can be used to connect multiple
FPDLink-III based sensors to TI EVMs. The board has two DS90UB960
deserializers, each of which aggregates input from up to 4x FPDLink-III
sensors. Up to 8x sensors can simultaneously stream over the two CSI RX
ports on J721E SK.
CSI2RX connectivity on AM68-SK and AM69-SK is the same as that of J721E-SK,
hence the same overlay can be reused.
[1]: https://svtronics.com/product/fusion-application-daughter-board-evm577pfusion-v1-0/?srsltid=AfmBOooMsRAd5ibFOGJaKbjsC3j9-loTPK2wWqsqPq2Adj55g1nPluxX
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 10 +
.../dts/ti/k3-j721e-sk-fpdlink-fusion.dtso | 191 ++++++++++++++++++
2 files changed, 201 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 79ce2ff38cc3..b31bf2f305aa 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -148,6 +148,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie1-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-fpdlink-fusion.dtbo
# Boards with J721s2 SoC
dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar.dtb
@@ -268,8 +269,12 @@ k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \
k3-am68-sk-base-board-pcie1-ep.dtbo
+k3-am68-sk-fpdlink-fusion-dtbs := k3-am68-sk-base-board.dtb \
+ k3-j721e-sk-fpdlink-fusion.dtbo
k3-am69-sk-csi2-dual-imx219-dtbs := k3-am69-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
+k3-am69-sk-fpdlink-fusion-dtbs := k3-am69-sk.dtb \
+ k3-j721e-sk-fpdlink-fusion.dtbo
k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \
k3-am69-sk-pcie0-ep.dtbo
k3-j7200-evm-pcie1-ep-dtbs := k3-j7200-common-proc-board.dtb \
@@ -284,6 +289,8 @@ k3-j721e-evm-pcie1-ep-dtbs := k3-j721e-common-proc-board.dtb \
k3-j721e-evm-pcie1-ep.dtbo
k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
+k3-j721e-sk-fpdlink-fusion-dtbs := k3-j721e-sk.dtb \
+ k3-j721e-sk-fpdlink-fusion.dtbo
k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-evm.dtb \
k3-j721s2-evm-fusion.dtbo
k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
@@ -348,7 +355,9 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-am68-phyboard-izar-peb-av-15.dtb \
k3-am68-sk-base-board-csi2-dual-imx219.dtb \
k3-am68-sk-base-board-pcie1-ep.dtb \
+ k3-am68-sk-fpdlink-fusion.dtb \
k3-am69-sk-csi2-dual-imx219.dtb \
+ k3-am69-sk-fpdlink-fusion.dtb \
k3-am69-sk-pcie0-ep.dtb \
k3-j7200-evm-pcie1-ep.dtb \
k3-j721e-common-proc-board-infotainment.dtb \
@@ -356,6 +365,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j721e-evm-pcie0-ep.dtb \
k3-j721e-evm-pcie1-ep.dtb \
k3-j721e-sk-csi2-dual-imx219.dtb \
+ k3-j721e-sk-fpdlink-fusion.dtb \
k3-j721s2-evm-fpdlink-fusion.dtb \
k3-j721s2-evm-pcie1-ep.dtb \
k3-j721s2-evm-usb0-type-a.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
new file mode 100644
index 000000000000..dd82ec3accfe
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for Fusion (FPD-Link III) board on J721E SK,
+ * AM68 SK or AM69 SK.
+ * https://svtronics.com/portfolio/evm577pfusion-v1-0-fusion/
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+
+&cam0_i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ deser@3d {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x3d>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX*/
+ port@4 {
+ reg = <4>;
+ ds90ub960_0_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@36 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x36>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ deserializer_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX*/
+ port@4 {
+ reg = <4>;
+ ds90ub960_1_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub960_1_csi_out>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 10/18] arm64: dts: ti: k3-j722s-evm: Add overlay for fusion application daughter board
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (8 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 09/18] arm64: dts: ti: k3-j721e-sk: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:48 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 11/18] arm64: dts: ti: k3-am68-sk: Add overlay for dual Arducam V3link fusion Yemike Abhilash Chandra
` (7 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
Fusion application daughter board [1] can be used to connect multiple
FPDLink-III based sensors to TI EVMs. The board has two DS90UB960
deserializers, each of which aggregates input from up to 4x FPDLink-III
sensors. Up to 8x sensors can simultaneously stream over the two CSI RX
ports on J722S EVM.
[1]: https://svtronics.com/product/fusion-application-daughter-board-evm577pfusion-v1-0/?srsltid=AfmBOooMsRAd5ibFOGJaKbjsC3j9-loTPK2wWqsqPq2Adj55g1nPluxX
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 4 +
.../dts/ti/k3-j722s-evm-fpdlink-fusion.dtso | 196 ++++++++++++++++++
2 files changed, 200 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index b31bf2f305aa..cb16eb9039aa 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -173,6 +173,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-fpdlink-fusion.dtbo
# Boards with J784s4 SoC
dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb
@@ -301,6 +302,8 @@ k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
+k3-j722s-evm-fpdlink-fusion-dtbs := k3-j722s-evm.dtb \
+ k3-j722s-evm-fpdlink-fusion.dtbo
k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
k3-j784s4-j742s2-evm-usb0-type-a.dtbo
k3-j784s4-evm-fpdlink-fusion-dtbs := k3-j784s4-evm.dtb \
@@ -371,6 +374,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j721s2-evm-usb0-type-a.dtb \
k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
+ k3-j722s-evm-fpdlink-fusion.dtb \
k3-j742s2-evm-usb0-type-a.dtb \
k3-j784s4-evm-fpdlink-fusion.dtb \
k3-j784s4-evm-pcie0-pcie1-ep.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso
new file mode 100644
index 000000000000..cbad2409a9c1
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for Fusion (FPD-Link III) board on J721E EVM
+ * https://svtronics.com/portfolio/evm577pfusion-v1-0-fusion/
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+
+&pca9543_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ deser@3d {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x3d>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ ds90ub960_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_0_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ ds90ub960_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@36 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x36>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ ds90ub960_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_1_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ ds90ub960_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub960_1_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 11/18] arm64: dts: ti: k3-am68-sk: Add overlay for dual Arducam V3link fusion
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (9 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 10/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 12/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
` (6 subsequent siblings)
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
Arducam's V3Link mini fusion board [1] has a single DS90UB960
deserializer which can aggregate input from up to 4x V3Link (and
FPD-Link III) based cameras over a single 22-pin FFC (4-lane) CSI-2
connector. Add an overlay supporting two such boards, each connected to
one of the two CSI RX inputs on AM68-SK.
The same overlay can be reused on AM69-SK and J721E-SK.
[1] https://www.arducam.com/downloads/datasheet/Arducam_V3Link_Datasheet.pdf
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 10 +
.../boot/dts/ti/k3-am68-sk-v3link-fusion.dtso | 204 ++++++++++++++++++
2 files changed, 214 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index cb16eb9039aa..b14c9a8c94b9 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -160,6 +160,7 @@ k3-am68-phyboard-izar-peb-av-15-dtbs := k3-am68-phyboard-izar.dtb \
k3-am68-phyboard-izar-peb-av-15.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-v3link-fusion.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-fusion.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo
@@ -272,12 +273,16 @@ k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \
k3-am68-sk-base-board-pcie1-ep.dtbo
k3-am68-sk-fpdlink-fusion-dtbs := k3-am68-sk-base-board.dtb \
k3-j721e-sk-fpdlink-fusion.dtbo
+k3-am68-sk-v3link-fusion-dtbs := k3-am68-sk-base-board.dtb \
+ k3-am68-sk-v3link-fusion.dtbo
k3-am69-sk-csi2-dual-imx219-dtbs := k3-am69-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
k3-am69-sk-fpdlink-fusion-dtbs := k3-am69-sk.dtb \
k3-j721e-sk-fpdlink-fusion.dtbo
k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \
k3-am69-sk-pcie0-ep.dtbo
+k3-am69-sk-v3link-fusion-dtbs := k3-am69-sk.dtb \
+ k3-am68-sk-v3link-fusion.dtbo
k3-j7200-evm-pcie1-ep-dtbs := k3-j7200-common-proc-board.dtb \
k3-j7200-evm-pcie1-ep.dtbo
k3-j721e-common-proc-board-infotainment-dtbs := k3-j721e-common-proc-board.dtb \
@@ -292,6 +297,8 @@ k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
k3-j721e-sk-fpdlink-fusion-dtbs := k3-j721e-sk.dtb \
k3-j721e-sk-fpdlink-fusion.dtbo
+k3-j721e-sk-v3link-fusion-dtbs := k3-j721e-sk.dtb \
+ k3-am68-sk-v3link-fusion.dtbo
k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-evm.dtb \
k3-j721s2-evm-fusion.dtbo
k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
@@ -359,9 +366,11 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-am68-sk-base-board-csi2-dual-imx219.dtb \
k3-am68-sk-base-board-pcie1-ep.dtb \
k3-am68-sk-fpdlink-fusion.dtb \
+ k3-am68-sk-v3link-fusion.dtb \
k3-am69-sk-csi2-dual-imx219.dtb \
k3-am69-sk-fpdlink-fusion.dtb \
k3-am69-sk-pcie0-ep.dtb \
+ k3-am69-sk-v3link-fusion.dtb \
k3-j7200-evm-pcie1-ep.dtb \
k3-j721e-common-proc-board-infotainment.dtb \
k3-j721e-evm-fpdlink-fusion.dtb \
@@ -369,6 +378,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j721e-evm-pcie1-ep.dtb \
k3-j721e-sk-csi2-dual-imx219.dtb \
k3-j721e-sk-fpdlink-fusion.dtb \
+ k3-j721e-sk-v3link-fusion.dtb \
k3-j721s2-evm-fpdlink-fusion.dtb \
k3-j721s2-evm-pcie1-ep.dtb \
k3-j721s2-evm-usb0-type-a.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso b/arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso
new file mode 100644
index 000000000000..cfbf59c45782
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for Arducam V3Link UC-A09 board
+ * https://www.arducam.com/fpd-link-3-cameras/
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-pinctrl.h"
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+&csi_mux {
+ idle-state = <1>;
+};
+
+&cam0_i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ deser@30 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x30>;
+
+ clock-names = "refclk";
+ clocks = <&clk_fusion_25M_fixed>;
+
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_0_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cam1_i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ deser@30 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x30>;
+
+ clock-names = "refclk";
+ clocks = <&clk_fusion_25M_fixed>;
+
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ deserializer_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_1_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ bus-type = <4>; /* CSI2 DPHY. */
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub960_1_csi_out>;
+ bus-type = <4>; /* CSI2 DPHY. */
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 12/18] arm64: dts: ti: k3-j722s-evm: Add overlay for dual Arducam V3link fusion
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (10 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 11/18] arm64: dts: ti: k3-am68-sk: Add overlay for dual Arducam V3link fusion Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 13/18] arm64: dts: ti: k3-j784s4-evm: Add overlay for J7EXPA01EVM Fusion2 Yemike Abhilash Chandra
` (5 subsequent siblings)
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
Arducam's V3Link mini fusion board [1] has a single DS90UB960
deserializer which can aggregate input from up to 4x V3Link (and
FPD-Link III) based cameras over a single 22-pin FFC (4-lane) CSI-2
connector. Add an overlay supporting two such boards, each connected to
one of the two CSI RX inputs on J722S.
[1] https://www.arducam.com/downloads/datasheet/Arducam_V3Link_Datasheet.pdf
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 4 +
.../dts/ti/k3-j722s-evm-v3link-fusion.dtso | 213 ++++++++++++++++++
2 files changed, 217 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-v3link-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index b14c9a8c94b9..0741f9c16034 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -175,6 +175,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-fpdlink-fusion.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-v3link-fusion.dtbo
# Boards with J784s4 SoC
dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb
@@ -311,6 +312,8 @@ k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
k3-j722s-evm-fpdlink-fusion-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-fpdlink-fusion.dtbo
+k3-j722s-evm-v3link-fusion-dtbs := k3-j722s-evm.dtb \
+ k3-j722s-evm-v3link-fusion.dtbo
k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
k3-j784s4-j742s2-evm-usb0-type-a.dtbo
k3-j784s4-evm-fpdlink-fusion-dtbs := k3-j784s4-evm.dtb \
@@ -385,6 +388,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
k3-j722s-evm-fpdlink-fusion.dtb \
+ k3-j722s-evm-v3link-fusion.dtb \
k3-j742s2-evm-usb0-type-a.dtb \
k3-j784s4-evm-fpdlink-fusion.dtb \
k3-j784s4-evm-pcie0-pcie1-ep.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-v3link-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-v3link-fusion.dtso
new file mode 100644
index 000000000000..c5baf35c0ac6
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-v3link-fusion.dtso
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for Arducam V3Link UC-A09 board
+ * https://www.arducam.com/fpd-link-3-cameras/
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+&csi01_mux {
+ idle-state = <1>;
+};
+
+&csi23_mux {
+ idle-state = <1>;
+};
+
+&pca9543_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* CAM0 I2C */
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ deser@30 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x30>;
+
+ clock-names = "refclk";
+ clocks = <&clk_fusion_25M_fixed>;
+
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_0_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ /* CAM1 I2C */
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ deser@30 {
+ compatible = "ti,ds90ub960-q1";
+ reg = <0x30>;
+
+ clock-names = "refclk";
+ clocks = <&clk_fusion_25M_fixed>;
+
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ deserializer_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub960_1_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub960_1_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 13/18] arm64: dts: ti: k3-j784s4-evm: Add overlay for J7EXPA01EVM Fusion2
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (11 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 12/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 14/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
` (4 subsequent siblings)
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Vaishnav Achath <vaishnav.a@ti.com>
J7EXPA01EVM Fusion2 serial capture expansion board features 3 UB9702
deserializers, each capable of aggregating data from up to 4x cameras
over the FPDLink-IV interface. Add support for the same on J784S4-EVM.
EVM schematics and design files : https://www.ti.com/tool/J7EXPA01EVM
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 4 +
.../ti/k3-j784s4-evm-fpdlink-iv-fusion.dtso | 281 ++++++++++++++++++
2 files changed, 285 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-fpdlink-iv-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 0741f9c16034..7da84197402e 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -183,6 +183,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-fpdlink-iv-fusion.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-pcie0-pcie1-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo
@@ -318,6 +319,8 @@ k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
k3-j784s4-j742s2-evm-usb0-type-a.dtbo
k3-j784s4-evm-fpdlink-fusion-dtbs := k3-j784s4-evm.dtb \
k3-j721s2-evm-fusion.dtbo
+k3-j784s4-evm-fpdlink-iv-fusion-dtbs := k3-j784s4-evm.dtb \
+ k3-j784s4-evm-fpdlink-iv-fusion.dtbo
k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \
k3-j784s4-evm-pcie0-pcie1-ep.dtbo
k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \
@@ -391,6 +394,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j722s-evm-v3link-fusion.dtb \
k3-j742s2-evm-usb0-type-a.dtb \
k3-j784s4-evm-fpdlink-fusion.dtb \
+ k3-j784s4-evm-fpdlink-iv-fusion.dtb \
k3-j784s4-evm-pcie0-pcie1-ep.dtb \
k3-j784s4-evm-quad-port-eth-exp1.dtb \
k3-j784s4-evm-usb0-type-a.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm-fpdlink-iv-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-evm-fpdlink-iv-fusion.dtso
new file mode 100644
index 000000000000..9f4479a03856
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm-fpdlink-iv-fusion.dtso
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * DT Overlay for FPDLink IV UB9702 Deserializer on J784S4 EVM
+ * https://www.ti.com/tool/J7EXPA01EVM
+ *
+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+&exp5 {
+ p0-hog{
+ gpio-hog;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI2_EXP_RSTZ";
+ };
+};
+
+&main_i2c5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ deser@3d {
+ compatible = "ti,ds90ub9702-q1";
+ reg = <0x3d>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub970_0_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@30 {
+ compatible = "ti,ds90ub9702-q1";
+ reg = <0x30>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ deserializer_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub970_1_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@32 {
+ compatible = "ti,ds90ub9702-q1";
+ reg = <0x32>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x6a 0x6b 0x6c 0x6d 0x6e 0x6f>;
+
+ deserializer_2_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub970_2_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy2>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_2_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub970_0_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub970_1_csi_out>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx2 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi2_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy2: endpoint {
+ remote-endpoint = <&ds90ub970_2_csi_out>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&ti_csi2rx2 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
+
+&dphy2 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 14/18] arm64: dts: ti: k3-j722s-evm: Add overlay for J7EXPA01EVM Fusion2
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (12 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 13/18] arm64: dts: ti: k3-j784s4-evm: Add overlay for J7EXPA01EVM Fusion2 Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 15/18] arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM Yemike Abhilash Chandra
` (3 subsequent siblings)
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
J7EXPA01EVM Fusion2 serial capture expansion board features 3 UB9702
deserializers, each capable of aggregating data from up to 4x cameras
over the FPDLink-IV interface. Add support for the same on J722S-EVM.
EVM schematics and design files : https://www.ti.com/tool/J7EXPA01EVM
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 4 +
.../ti/k3-j722s-evm-fpdlink-iv-fusion.dtso | 296 ++++++++++++++++++
2 files changed, 300 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-iv-fusion.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 7da84197402e..0246f582ca00 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -175,6 +175,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-fpdlink-fusion.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-fpdlink-iv-fusion.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-v3link-fusion.dtbo
# Boards with J784s4 SoC
@@ -313,6 +314,8 @@ k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
k3-j722s-evm-fpdlink-fusion-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-fpdlink-fusion.dtbo
+k3-j722s-evm-fpdlink-iv-fusion-dtbs := k3-j722s-evm.dtb \
+ k3-j722s-evm-fpdlink-iv-fusion.dtbo
k3-j722s-evm-v3link-fusion-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-v3link-fusion.dtbo
k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
@@ -391,6 +394,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
k3-j722s-evm-fpdlink-fusion.dtb \
+ k3-j722s-evm-fpdlink-iv-fusion.dtb \
k3-j722s-evm-v3link-fusion.dtb \
k3-j742s2-evm-usb0-type-a.dtb \
k3-j784s4-evm-fpdlink-fusion.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-iv-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-iv-fusion.dtso
new file mode 100644
index 000000000000..91bf23345b92
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-iv-fusion.dtso
@@ -0,0 +1,296 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * DT Overlay for FPDLink IV UB9702 Deserializer on J722S
+ * https://www.ti.com/tool/J7EXPA01EVM
+ *
+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-pinctrl.h"
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+&main_pmx0 {
+ csi_expansion_interface_reset: csi-expansion-interface-reset-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x114, PIN_OUTPUT, 7) /* (G26) GPIO0_68 */
+ >;
+ };
+};
+
+&main_gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&csi_expansion_interface_reset>;
+
+ line68-hog{
+ gpio-hog;
+ gpios = <68 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI2_EXP_RSTZ";
+ };
+};
+
+&pca9543_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ deser@3d {
+ compatible = "ti,ds90ub9702-q1";
+ reg = <0x3d>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub970_0_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@30 {
+ compatible = "ti,ds90ub9702-q1";
+ reg = <0x30>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>;
+
+ deserializer_1_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub970_1_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy1>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_1_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ deser@32 {
+ compatible = "ti,ds90ub9702-q1";
+ reg = <0x32>;
+ clocks = <&clk_fusion_25M_fixed>;
+ clock-names = "refclk";
+ i2c-alias-pool = <0x6a 0x6b 0x6c 0x6d 0x6e 0x6f>;
+
+ deserializer_2_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ port@2{
+ reg= <2>;
+ status = "disabled";
+ };
+
+ port@3{
+ reg= <3>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@4 {
+ reg = <4>;
+ ds90ub970_2_csi_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy2>;
+ };
+ };
+
+ port@5{
+ reg= <5>;
+ status = "disabled";
+ };
+ };
+
+ deserializer_2_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub970_0_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy1: endpoint {
+ remote-endpoint = <&ds90ub970_1_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx2 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi2_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy2: endpoint {
+ remote-endpoint = <&ds90ub970_2_csi_out>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
+
+&ti_csi2rx2 {
+ status = "okay";
+};
+
+&dphy2 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 15/18] arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (13 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 14/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:55 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 16/18] arm64: dts: ti: k3-j721e: " Yemike Abhilash Chandra
` (2 subsequent siblings)
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
DS90UB954-Q1EVM consists of a DS90UB954 deserializer which aggregates
data from up to 2x cameras over the FPDLink-III interface, and can be
used to connect FPDLink-III based sensors to TI EVMs.
Add an overlay to support it on J721S2-EVM.
Link: https://www.ti.com/tool/DS90UB954-Q1EVM
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 4 +
.../boot/dts/ti/k3-j721s2-evm-ub954.dtso | 93 +++++++++++++++++++
2 files changed, 97 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-ub954.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 0246f582ca00..3eb0304e89ef 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -167,6 +167,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo
k3-j721s2-evm-dtbs := k3-j721s2-common-proc-board.dtb k3-j721s2-evm-gesi-exp-board.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-ub954.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo
# Boards with J722s SoC
@@ -306,6 +307,8 @@ k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-evm.dtb \
k3-j721s2-evm-fusion.dtbo
k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
k3-j721s2-evm-pcie1-ep.dtbo
+k3-j721s2-evm-ub954-dtbs := k3-j721s2-evm.dtb \
+ k3-j721s2-evm-ub954.dtbo
k3-j721s2-evm-usb0-type-a-dtbs := k3-j721s2-common-proc-board.dtb \
k3-j721s2-evm-usb0-type-a.dtbo
k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \
@@ -390,6 +393,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j721e-sk-v3link-fusion.dtb \
k3-j721s2-evm-fpdlink-fusion.dtb \
k3-j721s2-evm-pcie1-ep.dtb \
+ k3-j721s2-evm-ub954.dtb \
k3-j721s2-evm-usb0-type-a.dtb \
k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-ub954.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-ub954.dtso
new file mode 100644
index 000000000000..6b058da0ad4b
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-ub954.dtso
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for DS90UB954-Q1EVM FPDLink-III deserializer board on J721S2 and J784S4 EVM
+ * https://www.ti.com/tool/DS90UB954-Q1EVM
+ *
+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+
+&main_i2c5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ deser@3d {
+ compatible = "ti,ds90ub954-q1";
+ reg = <0x3d>;
+ clock-names = "refclk";
+ clocks = <&clk_fusion_25M_fixed>;
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@2 {
+ reg = <2>;
+ ds90ub960_0_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 16/18] arm64: dts: ti: k3-j721e: Add overlay for DS90UB954-Q1EVM
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (14 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 15/18] arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 17/18] arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 18/18] arm64: defconfig: Enable DS90UB960 deserializer and DS90UB953 serializer Yemike Abhilash Chandra
17 siblings, 0 replies; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
DS90UB954-Q1EVM consists of a DS90UB954 deserializer which aggregates
data from up to 2x cameras over the FPDLink-III interface, and can be
used to connect FPDLink-III based sensors to TI EVMs.
Add an overlay to support it on J721E-EVM.
Link: https://www.ti.com/tool/DS90UB954-Q1EVM
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 4 +
.../arm64/boot/dts/ti/k3-j721e-evm-ub954.dtso | 93 +++++++++++++++++++
2 files changed, 97 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-evm-ub954.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 3eb0304e89ef..386fc77e4c49 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -146,6 +146,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-gesi.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-gesi-exp-board.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie0-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-pcie1-ep.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j721e-evm-ub954.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-fpdlink-fusion.dtbo
@@ -297,6 +298,8 @@ k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \
k3-j721e-evm-pcie0-ep.dtbo
k3-j721e-evm-pcie1-ep-dtbs := k3-j721e-common-proc-board.dtb \
k3-j721e-evm-pcie1-ep.dtbo
+k3-j721e-evm-ub954-dtbs := k3-j721e-common-proc-board.dtb \
+ k3-j721e-evm-ub954.dtbo
k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
k3-j721e-sk-fpdlink-fusion-dtbs := k3-j721e-sk.dtb \
@@ -388,6 +391,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j721e-evm-fpdlink-fusion.dtb \
k3-j721e-evm-pcie0-ep.dtb \
k3-j721e-evm-pcie1-ep.dtb \
+ k3-j721e-evm-ub954.dtb \
k3-j721e-sk-csi2-dual-imx219.dtb \
k3-j721e-sk-fpdlink-fusion.dtb \
k3-j721e-sk-v3link-fusion.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-ub954.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-ub954.dtso
new file mode 100644
index 000000000000..4e24ee86cddb
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721e-evm-ub954.dtso
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for DS90UB954-Q1EVM FPDLink-III deserializer board on J721E EVM
+ * https://www.ti.com/tool/DS90UB954-Q1EVM
+ *
+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_fusion_25M_fixed: fixed-clock-25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+};
+
+
+&main_i2c6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ deser@3d {
+ compatible = "ti,ds90ub954-q1";
+ reg = <0x3d>;
+ clock-names = "refclk";
+ clocks = <&clk_fusion_25M_fixed>;
+ i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+ deserializer_0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0{
+ reg= <0>;
+ status = "disabled";
+ };
+
+ port@1{
+ reg= <1>;
+ status = "disabled";
+ };
+
+ /* CSI-2 TX */
+ port@2 {
+ reg = <2>;
+ ds90ub960_0_csi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ remote-endpoint = <&csi2_phy0>;
+ };
+ };
+ };
+
+ deserializer_0_links: links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2_phy0: endpoint {
+ remote-endpoint = <&ds90ub960_0_csi_out>;
+ data-lanes = <1 2 3 4>;
+ clock-lanes = <0>;
+ link-frequencies = /bits/ 64 <800000000>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 17/18] arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (15 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 16/18] arm64: dts: ti: k3-j721e: " Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 10:04 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 18/18] arm64: defconfig: Enable DS90UB960 deserializer and DS90UB953 serializer Yemike Abhilash Chandra
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
From: Jianzhong Xu <xuj@ti.com>
Arducam V3Link camera solution is shipped with an UB953 serializer
and an IMX219 sensor. [1]
Add an overlay for interfacing the UB953 serilaizer and IMX219 sensor
with the RX0 port on the UB960 deserializer. This overlay can be used to
interface an IMX219 sensor on any platform that supports the V3Link
fusion board.
[1]: https://docs.arducam.com/V3Link-Camera-Solution/V3Link-Camera-Solution-on-TI-Platform/Introduction/
Signed-off-by: Jianzhong Xu <xuj@ti.com>
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 31 +++--
.../boot/dts/ti/k3-v3link-imx219-0-0.dtso | 127 ++++++++++++++++++
2 files changed, 146 insertions(+), 12 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 386fc77e4c49..f252d402cb85 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -195,6 +195,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-j784s4-j742s2-evm-usb0-type-a.dtbo
# Boards with J742S2 SoC
dtb-$(CONFIG_ARCH_K3) += k3-j742s2-evm.dtb
+# IMX219 FPDLink Sensors
+dtb-$(CONFIG_ARCH_K3) += k3-v3link-imx219-0-0.dtbo
+
# Build time test only, enabled by CONFIG_OF_ALL_DTBS
k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \
k3-am625-beagleplay-csi2-ov5640.dtbo
@@ -278,16 +281,18 @@ k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \
k3-am68-sk-base-board-pcie1-ep.dtbo
k3-am68-sk-fpdlink-fusion-dtbs := k3-am68-sk-base-board.dtb \
k3-j721e-sk-fpdlink-fusion.dtbo
-k3-am68-sk-v3link-fusion-dtbs := k3-am68-sk-base-board.dtb \
- k3-am68-sk-v3link-fusion.dtbo
+k3-am68-sk-v3link-fusion-imx219-dtbs := k3-am68-sk-base-board.dtb \
+ k3-am68-sk-v3link-fusion.dtbo \
+ k3-v3link-imx219-0-0.dtbo
k3-am69-sk-csi2-dual-imx219-dtbs := k3-am69-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
k3-am69-sk-fpdlink-fusion-dtbs := k3-am69-sk.dtb \
k3-j721e-sk-fpdlink-fusion.dtbo
k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \
k3-am69-sk-pcie0-ep.dtbo
-k3-am69-sk-v3link-fusion-dtbs := k3-am69-sk.dtb \
- k3-am68-sk-v3link-fusion.dtbo
+k3-am69-sk-v3link-fusion-imx219-dtbs := k3-am69-sk.dtb \
+ k3-am68-sk-v3link-fusion.dtbo \
+ k3-v3link-imx219-0-0.dtbo
k3-j7200-evm-pcie1-ep-dtbs := k3-j7200-common-proc-board.dtb \
k3-j7200-evm-pcie1-ep.dtbo
k3-j721e-common-proc-board-infotainment-dtbs := k3-j721e-common-proc-board.dtb \
@@ -304,8 +309,9 @@ k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
k3-j721e-sk-csi2-dual-imx219.dtbo
k3-j721e-sk-fpdlink-fusion-dtbs := k3-j721e-sk.dtb \
k3-j721e-sk-fpdlink-fusion.dtbo
-k3-j721e-sk-v3link-fusion-dtbs := k3-j721e-sk.dtb \
- k3-am68-sk-v3link-fusion.dtbo
+k3-j721e-sk-v3link-fusion-imx219-dtbs := k3-j721e-sk.dtb \
+ k3-am68-sk-v3link-fusion.dtbo \
+ k3-v3link-imx219-0-0.dtbo
k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-evm.dtb \
k3-j721s2-evm-fusion.dtbo
k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
@@ -322,8 +328,9 @@ k3-j722s-evm-fpdlink-fusion-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-fpdlink-fusion.dtbo
k3-j722s-evm-fpdlink-iv-fusion-dtbs := k3-j722s-evm.dtb \
k3-j722s-evm-fpdlink-iv-fusion.dtbo
-k3-j722s-evm-v3link-fusion-dtbs := k3-j722s-evm.dtb \
- k3-j722s-evm-v3link-fusion.dtbo
+k3-j722s-evm-v3link-fusion-imx219-dtbs := k3-j722s-evm.dtb \
+ k3-j722s-evm-v3link-fusion.dtbo \
+ k3-v3link-imx219-0-0.dtbo
k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
k3-j784s4-j742s2-evm-usb0-type-a.dtbo
k3-j784s4-evm-fpdlink-fusion-dtbs := k3-j784s4-evm.dtb \
@@ -381,11 +388,11 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-am68-sk-base-board-csi2-dual-imx219.dtb \
k3-am68-sk-base-board-pcie1-ep.dtb \
k3-am68-sk-fpdlink-fusion.dtb \
- k3-am68-sk-v3link-fusion.dtb \
+ k3-am68-sk-v3link-fusion-imx219.dtb \
k3-am69-sk-csi2-dual-imx219.dtb \
k3-am69-sk-fpdlink-fusion.dtb \
k3-am69-sk-pcie0-ep.dtb \
- k3-am69-sk-v3link-fusion.dtb \
+ k3-am69-sk-v3link-fusion-imx219.dtb \
k3-j7200-evm-pcie1-ep.dtb \
k3-j721e-common-proc-board-infotainment.dtb \
k3-j721e-evm-fpdlink-fusion.dtb \
@@ -394,7 +401,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j721e-evm-ub954.dtb \
k3-j721e-sk-csi2-dual-imx219.dtb \
k3-j721e-sk-fpdlink-fusion.dtb \
- k3-j721e-sk-v3link-fusion.dtb \
+ k3-j721e-sk-v3link-fusion-imx219.dtb \
k3-j721s2-evm-fpdlink-fusion.dtb \
k3-j721s2-evm-pcie1-ep.dtb \
k3-j721s2-evm-ub954.dtb \
@@ -403,7 +410,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
k3-j722s-evm-fpdlink-fusion.dtb \
k3-j722s-evm-fpdlink-iv-fusion.dtb \
- k3-j722s-evm-v3link-fusion.dtb \
+ k3-j722s-evm-v3link-fusion-imx219.dtb \
k3-j742s2-evm-usb0-type-a.dtb \
k3-j784s4-evm-fpdlink-fusion.dtb \
k3-j784s4-evm-fpdlink-iv-fusion.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso b/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
new file mode 100644
index 000000000000..049438f9fc89
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * IMX219 Camera Module for V3-Link d-ch Adapter Board
+ * https://docs.arducam.com/V3Link-Camera-Solution/V3Link-Camera-Solution-on-TI-Platform/Introduction/
+ *
+ * Copyright (c) 2024 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ clk_imx219_fixed_00: imx219-xclk-00 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
+ reg_2p8v: regulator-2p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ reg_1p2v: regulator-1p2v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+};
+
+&deserializer_0_ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* FPDLink RX 0 */
+ port@0 {
+ reg = <0>;
+
+ ub960_fpd3_1_in: endpoint {
+ remote-endpoint = <&ub953_1_out>;
+ };
+ };
+};
+
+&deserializer_0_links {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ link@0 {
+ reg = <0>;
+ i2c-alias = <0x44>;
+
+ ti,rx-mode = <3>;
+
+ serializer: serializer {
+ compatible = "ti,ds90ub953-q1";
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ #clock-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ ub953_1_in: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ remote-endpoint = <&sensor_1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ub953_1_out: endpoint {
+ remote-endpoint = <&ub960_fpd3_1_in>;
+ };
+ };
+ };
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sensor@10 {
+ compatible = "sony,imx219";
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed_00>;
+
+ VANA-supply = <®_2p8v>;
+ VDIG-supply = <®_1p8v>;
+ VDDL-supply = <®_1p2v>;
+
+ reset-gpios = <&serializer 1 GPIO_ACTIVE_HIGH>;
+
+ port {
+ sensor_1_out: endpoint {
+ remote-endpoint = <&ub953_1_in>;
+ link-frequencies = /bits/ 64 <456000000>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+ };
+ };
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 18/18] arm64: defconfig: Enable DS90UB960 deserializer and DS90UB953 serializer
2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
` (16 preceding siblings ...)
2026-07-02 9:31 ` [PATCH 17/18] arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer Yemike Abhilash Chandra
@ 2026-07-02 9:31 ` Yemike Abhilash Chandra
2026-07-02 10:54 ` Krzysztof Kozlowski
17 siblings, 1 reply; 29+ messages in thread
From: Yemike Abhilash Chandra @ 2026-07-02 9:31 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
Enable building Texas Instruments DS90UB960 deserializer and
DS90UB953 serializer drivers as modules.
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 207e213cc45b..bf4703160015 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -914,6 +914,8 @@ CONFIG_SDR_PLATFORM_DRIVERS=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_AMPHION_VPU=m
CONFIG_VIDEO_CADENCE_CSI2RX=m
+CONFIG_VIDEO_DS90UB960=m
+CONFIG_VIDEO_DS90UB953=m
CONFIG_VIDEO_WAVE_VPU=m
CONFIG_VIDEO_E5010_JPEG_ENC=m
CONFIG_VIDEO_MEDIATEK_JPEG=m
--
2.34.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH 08/18] arm64: dts: ti: k3-j721s2: Add overlay for fusion application daughter board
2026-07-02 9:31 ` [PATCH 08/18] arm64: dts: ti: k3-j721s2: " Yemike Abhilash Chandra
@ 2026-07-02 9:45 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:45 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: devicetree, robh, conor+dt, Frank.Li, imx
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The commit message claims the overlay can be reused for J742S2, but the required device tree combination target is missing from the Makefile.
- [Low] The `csi2_phy0` endpoint definition is missing the `bus-type = <4>;` property, while the identical `csi2_phy1` endpoint explicitly defines it.
--
commit 38600625d6a88602aa3dc77a7657b2be15b2c563
Author: Vaishnav Achath <vaishnav.a@ti.com>
arm64: dts: ti: k3-j721s2: Add overlay for fusion application daughter board
This patch adds an overlay for the Fusion application daughter board to
connect multiple FPDLink-III based sensors to TI EVMs. The commit message
notes that CSI2RX connectivity on J784S4 and J742S2 is the same as J721S2,
allowing the overlay to be reused.
Link: https://svtronics.com/product/fusion-application-daughter-board-evm577pfusion-v1-0/?srsltid=AfmBOooMsRAd5ibFOGJaKbjsC3j9-loTPK2wWqsqPq2Adj55g1nPluxX
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 350a8b5ad275c..9dd25a21d738e 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
[ ... ]
> @@ -333,6 +336,8 @@ k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
> k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
> k3-j742s2-evm-usb0-type-a-dtbs := k3-j742s2-evm.dtb \
> k3-j784s4-j742s2-evm-usb0-type-a.dtbo
> +k3-j784s4-evm-fpdlink-fusion-dtbs := k3-j784s4-evm.dtb \
> + k3-j721s2-evm-fusion.dtbo
[Severity: Medium]
The commit message mentions the overlay can be reused for J742S2, but should
a build target for k3-j742s2-evm-fpdlink-fusion.dtbs also be added here?
> k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \
> k3-j784s4-evm-pcie0-pcie1-ep.dtbo
> k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \
[ ... ]
> @@ -400,11 +405,13 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
> k3-j721e-evm-pcie0-ep.dtb \
> k3-j721e-evm-pcie1-ep.dtb \
> k3-j721e-sk-csi2-dual-imx219.dtb \
> + k3-j721s2-evm-fpdlink-fusion.dtb \
> k3-j721s2-evm-pcie1-ep.dtb \
> k3-j721s2-evm-usb0-type-a.dtb \
> k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
> k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
> k3-j742s2-evm-usb0-type-a.dtb \
> + k3-j784s4-evm-fpdlink-fusion.dtb \
[Severity: Medium]
Does k3-j742s2-evm-fpdlink-fusion.dtb need to be appended to this list so
the J742S2 combination device tree gets built?
> k3-j784s4-evm-pcie0-pcie1-ep.dtb \
> k3-j784s4-evm-quad-port-eth-exp1.dtb \
> k3-j784s4-evm-usb0-type-a.dtb \
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso
> new file mode 100644
> index 0000000000000..f200cdaa1bab1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-fusion.dtso
[ ... ]
> +&cdns_csi2rx0 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi0_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2_phy0: endpoint {
> + remote-endpoint = <&ds90ub960_0_csi_out>;
[Severity: Low]
This isn't a bug, but should this endpoint explicitly define bus-type = <4>
to remain consistent with how csi2_phy1 configures it below?
> + clock-lanes = <0>;
> + data-lanes = <1 2 3 4>;
> + link-frequencies = /bits/ 64 <800000000>;
> +
> + };
> + };
> + };
> +};
> +
> +&cdns_csi2rx1 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi1_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2_phy1: endpoint {
> + remote-endpoint = <&ds90ub960_1_csi_out>;
> + bus-type = <4>; /* CSI2 DPHY */
> + clock-lanes = <0>;
> + data-lanes = <1 2 3 4>;
> + link-frequencies = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=8
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 04/18] arm64: dts: ti: k3-j784s4-j742s2-main-common: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 ` [PATCH 04/18] arm64: dts: ti: k3-j784s4-j742s2-main-common: " Yemike Abhilash Chandra
@ 2026-07-02 9:46 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:46 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: imx, robh, devicetree, conor+dt, Frank.Li
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] DMA channel leak on driver removal and probe failure due to incorrect PM runtime status checks.
--
commit ea67c91b4fdffdca029b973dd9749e310980e700
Author: Vaishnav Achath <vaishnav.a@ti.com>
arm64: dts: ti: k3-j784s4-j742s2-main-common: Add multiple channels for CSI2RX DMA
J721E CSI2RX SHIM layer can support up to 32 DMA channel contexts,
Add additional DMA channels to enable multistream support for CSI2RX.
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> index c2636e624f18b..4b4545a5af192 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> @@ -811,8 +811,11 @@ ti_csi2rx0: ticsi2rx@4500000 {
> ranges;
> #address-cells = <2>;
> #size-cells = <2>;
> - dmas = <&main_bcdma_csi 0 0x4940 0>;
> - dma-names = "rx0";
> + dmas = <&main_bcdma_csi 0 0x4940 0>, <&main_bcdma_csi 0 0x4941 0>,
> + <&main_bcdma_csi 0 0x4942 0>, <&main_bcdma_csi 0 0x4943 0>,
> + <&main_bcdma_csi 0 0x4944 0>, <&main_bcdma_csi 0 0x4945 0>,
> + <&main_bcdma_csi 0 0x4946 0>, <&main_bcdma_csi 0 0x4947 0>;
> + dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7";
> power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
>
[Severity: High]
This isn't a bug introduced by this patch, but adding these multiple channels
amplifies a pre-existing DMA channel leak in the j721e-csi2rx driver.
When ti_csi2rx_remove() is called or during probe failure, are all of these
allocated DMA channels permanently leaked?
Looking at ti_csi2rx_remove() in
drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c, the device is
explicitly forced into a suspended state before cleaning up the contexts:
if (!pm_runtime_status_suspended(&pdev->dev))
pm_runtime_set_suspended(&pdev->dev);
for (unsigned int i = 0; i < csi->num_ctx; i++)
ti_csi2rx_cleanup_ctx(&csi->ctx[i]);
When ti_csi2rx_cleanup_ctx() is called, it checks the suspend status:
if (!pm_runtime_status_suspended(ctx->csi->dev))
dma_release_channel(ctx->dma.chan);
Since the device was suspended just prior to this loop, won't this check
always evaluate to false and skip dma_release_channel() completely?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=4
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 07/18] arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter board
2026-07-02 9:31 ` [PATCH 07/18] arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter board Yemike Abhilash Chandra
@ 2026-07-02 9:47 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:47 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: Frank.Li, conor+dt, devicetree, imx, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing `bus-type` property in `csi2_phy0` endpoint for `cdns_csi2rx0`.
--
commit c46b85eb404e26671d904b1552f797a50e25e19d
Author: Vaishnav Achath <vaishnav.a@ti.com>
arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter board
This patch adds a device tree overlay for the Fusion application daughter
board, which connects multiple FPDLink-III based sensors to TI EVMs. It
configures two DS90UB960 deserializers that aggregate input from up to 8
sensors over the two CSI RX ports on the J721E.
[1]: https://svtronics.com/product/fusion-application-daughter-board-evm577pfusion-v1-0/?srsltid=AfmBOooMsRAd5ibFOGJaKbjsC3j9-loTPK2wWqsqPq2Adj55g1nPluxX
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso
> new file mode 100644
> index 0000000000000..0df2e48a4089c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-evm-fusion.dtso
[ ... ]
> +&cdns_csi2rx0 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi0_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2_phy0: endpoint {
> + remote-endpoint = <&ds90ub960_0_csi_out>;
> + clock-lanes = <0>;
> + data-lanes = <1 2 3 4>;
> + link-frequencies = /bits/ 64 <800000000>;
> +
> + };
[Severity: Low]
Does the csi2_phy0 endpoint need an explicit bus-type property?
While device tree parsing will likely fall back to V4L2_MBUS_CSI2_DPHY
automatically because clock-lanes and data-lanes are present, the
bus-type = <4>; property is missing here.
This creates a minor inconsistency with the identically structured
csi2_phy1 endpoint just below it, which explicitly defines the bus type.
> + };
> + };
> +};
> +
> +&cdns_csi2rx1 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi1_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2_phy1: endpoint {
> + remote-endpoint = <&ds90ub960_1_csi_out>;
> + bus-type = <4>; /* CSI2 DPHY */
> + clock-lanes = <0>;
> + data-lanes = <1 2 3 4>;
> + link-frequencies = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=7
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 06/18] arm64: dts: ti: k3-j722s-main: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 ` [PATCH 06/18] arm64: dts: ti: k3-j722s-main: " Yemike Abhilash Chandra
@ 2026-07-02 9:47 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:47 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: robh, conor+dt, Frank.Li, imx, devicetree
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] DMA channel leak in ti_csi2rx_runtime_resume() on error path.
- [High] DMA channel leak in ti_csi2rx_probe() on context initialization failure.
--
commit 93bee806331f1aba1613005a42f8e9a3e3a302f3
Author: Vaishnav Achath <vaishnav.a@ti.com>
arm64: dts: ti: k3-j722s-main: Add multiple channels for CSI2RX DMA
This commit adds additional DMA channels to the J721E CSI2RX SHIM layer to
enable multistream support for CSI2RX. It increases the number of DMA channels
per node from one to four.
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> index 5a5b9a1bfd9ea..199c8652bcde2 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> @@ -173,8 +173,9 @@ ti_csi2rx1: ticsi2rx@30122000 {
> ranges;
> #address-cells = <2>;
> #size-cells = <2>;
> - dmas = <&main_bcdma_csi 0 0x5100 0>;
> - dma-names = "rx0";
> + dmas = <&main_bcdma_csi 0 0x5100 0>, <&main_bcdma_csi 0 0x5101 0>,
> + <&main_bcdma_csi 0 0x5102 0>, <&main_bcdma_csi 0 0x5103 0>;
> + dma-names = "rx0", "rx1", "rx2", "rx3";
[Severity: High]
This isn't a bug introduced by this patch, but adding multiple DMA channels
exposes a dormant hardware DMA channel leak in the CSI2RX driver.
If ti_csi2rx_init_dma() fails for a context where i > 0 during runtime resume,
the function returns immediately without releasing the channels requested in
earlier loop iterations:
j721e-csi2rx.c:ti_csi2rx_runtime_resume() {
for (unsigned int i = 0; i < csi->num_ctx; i++) {
ret = ti_csi2rx_init_dma(&csi->ctx[i]);
if (ret)
return ret;
}
...
}
Does this code need an error path to release the successfully requested
channels when a subsequent iteration fails?
[Severity: High]
This is a pre-existing issue, but increasing the number of DMA channels here
also exposes another channel leak in the probe error path.
If ti_csi2rx_init_ctx() fails for a context i > 0, the driver attempts to
clean up previous contexts:
j721e-csi2rx.c:ti_csi2rx_probe() {
for (i = 0; i < csi->num_ctx; i++) {
csi->ctx[i].idx = i;
csi->ctx[i].csi = csi;
ret = ti_csi2rx_init_ctx(&csi->ctx[i]);
if (ret)
goto err_ctx;
}
...
}
However, the cleanup skips releasing the channel because the device's PM
runtime status is still suspended:
j721e-csi2rx.c:ti_csi2rx_cleanup_ctx() {
if (!pm_runtime_status_suspended(ctx->csi->dev))
dma_release_channel(ctx->dma.chan);
...
}
Since pm_runtime_set_active() hasn't been called yet during early probe, the
condition prevents dma_release_channel() from being executed. Could this
permanently leak the previously initialized hardware DMA channels?
> power-domains = <&k3_pds 247 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=6
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 10/18] arm64: dts: ti: k3-j722s-evm: Add overlay for fusion application daughter board
2026-07-02 9:31 ` [PATCH 10/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
@ 2026-07-02 9:48 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:48 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: devicetree, conor+dt, Frank.Li, robh, imx
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Low] Incorrect EVM name in the file header comment.
- [Low] Unused header inclusion.
- [Low] Inconsistent formatting in port declarations.
--
commit 7986b08cfb6e71a222dd7aeeb1377324b1869253
Author: Vaishnav Achath <vaishnav.a@ti.com>
arm64: dts: ti: k3-j722s-evm: Add overlay for fusion application daughter board
This commit adds a device tree overlay for the Fusion application daughter
board on the TI J722S EVM. It configures two DS90UB960 deserializers to
aggregate input from up to 8x FPDLink-III sensors over the CSI RX ports.
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso
> new file mode 100644
> index 0000000000000..cbad2409a9c18
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-fpdlink-fusion.dtso
> @@ -0,0 +1,196 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * DT Overlay for Fusion (FPD-Link III) board on J721E EVM
[Severity: Low]
This isn't a bug, but should this read J722S EVM instead of J721E EVM to
match the target board mentioned in the commit message and file name?
> + * https://svtronics.com/portfolio/evm577pfusion-v1-0-fusion/
> + *
> + * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
[Severity: Low]
This isn't a bug, but is this dt-bindings/gpio/gpio.h inclusion necessary?
It appears no GPIO-related bindings or constants are actually used in this
overlay.
[ ... ]
> + ds90ub960_0_ports: ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0{
> + reg= <0>;
> + status = "disabled";
> + };
[Severity: Low]
This isn't a bug, but does this spacing follow the standard device tree
formatting conventions? There appear to be missing spaces before the opening
brace and after the equals sign here, such as port@0 { instead of port@0{,
and reg = <0>; instead of reg= <0>;.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=10
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 09/18] arm64: dts: ti: k3-j721e-sk: Add overlay for fusion application daughter board
2026-07-02 9:31 ` [PATCH 09/18] arm64: dts: ti: k3-j721e-sk: " Yemike Abhilash Chandra
@ 2026-07-02 9:50 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:50 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: conor+dt, Frank.Li, devicetree, robh, imx
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] Inconsistent definition of the `bus-type` property between CSI-2 endpoints.
- [Low] Minor DTS styling and whitespace inconsistencies in port definitions.
--
commit 6e2c6c33cfd930bf555fb197269fc8e707df6261
Author: Vaishnav Achath <vaishnav.a@ti.com>
arm64: dts: ti: k3-j721e-sk: Add overlay for fusion application daughter board
This commit adds a device tree overlay for the Fusion application daughter
board, enabling FPDLink-III based sensors to connect to TI EVMs. It
configures two DS90UB960 deserializers and is compatible with J721E SK,
AM68-SK, and AM69-SK boards.
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso b/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
> new file mode 100644
> index 0000000000000..dd82ec3accfed
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-fpdlink-fusion.dtso
[ ... ]
> + deserializer_0_ports: ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0{
> + reg= <0>;
[Severity: Low]
This isn't a bug, but there are a few minor formatting inconsistencies with
whitespace before braces and around equal signs (e.g., port@0{ instead of
port@0 {, and reg= <0>; instead of reg = <0>;). Should these be adjusted to
match standard device tree style?
> + status = "disabled";
> + };
[ ... ]
> +&cdns_csi2rx0 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi0_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2_phy0: endpoint {
> + remote-endpoint = <&ds90ub960_0_csi_out>;
> + clock-lanes = <0>;
> + data-lanes = <1 2 3 4>;
> + link-frequencies = /bits/ 64 <800000000>;
> +
> + };
[Severity: Low]
Is it intentional that the bus-type property is omitted here in csi2_phy0,
while it is explicitly defined in csi2_phy1 below? While the V4L2 framework
might infer V4L2_MBUS_CSI2_DPHY automatically from the clock and data lanes,
would it be better to keep the property definitions consistent between the
two endpoints?
> + };
> + };
> +};
> +
> +&cdns_csi2rx1 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi1_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2_phy1: endpoint {
> + remote-endpoint = <&ds90ub960_1_csi_out>;
> + bus-type = <4>; /* CSI2 DPHY */
> + clock-lanes = <0>;
> + data-lanes = <1 2 3 4>;
> + link-frequencies = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=9
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 15/18] arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM
2026-07-02 9:31 ` [PATCH 15/18] arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM Yemike Abhilash Chandra
@ 2026-07-02 9:55 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:55 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: imx, Frank.Li, devicetree, conor+dt, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing build target for the J784S4 EVM using the UB954 overlay.
--
commit ad82842381a6b0a7a7dca389cbef513840daf997
Author: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM
This commit adds a device tree overlay for the DS90UB954-Q1EVM deserializer
board. It enables connecting FPDLink-III based sensors to TI EVMs by
aggregating data from up to two cameras. The overlay is integrated to support
the J721S2-EVM.
Link: https://www.ti.com/tool/DS90UB954-Q1EVM
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index aba187384009f..697d13b13b19e 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
[ ... ]
> @@ -346,6 +347,8 @@ k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-evm.dtb \
> k3-j721s2-evm-fusion.dtbo
> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
> k3-j721s2-evm-pcie1-ep.dtbo
> +k3-j721s2-evm-ub954-dtbs := k3-j721s2-evm.dtb \
> + k3-j721s2-evm-ub954.dtbo
> k3-j721s2-evm-usb0-type-a-dtbs := k3-j721s2-common-proc-board.dtb \
> k3-j721s2-evm-usb0-type-a.dtbo
[Severity: Low]
Does this Makefile omit a combined build target for the J784S4 EVM?
Looking at the newly added overlay file, the comment explicitly mentions
support for the J784S4 EVM as well:
arch/arm64/boot/dts/ti/k3-j721s2-evm-ub954.dtso:
/*
* DT Overlay for DS90UB954-Q1EVM FPDLink-III deserializer board on J721S2 and J784S4 EVM
* https://www.ti.com/tool/DS90UB954-Q1EVM
Without a corresponding k3-j784s4-evm-ub954-dtbs target here in the Makefile,
the overlay is not validated against the J784S4 base DTB during the build.
Should a build target for the J784S4 be added to match the intent stated in
the overlay header?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=15
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 03/18] arm64: dts: ti: k3-j721s2-main: Add multiple channels for CSI2RX DMA
2026-07-02 9:31 ` [PATCH 03/18] arm64: dts: ti: k3-j721s2-main: " Yemike Abhilash Chandra
@ 2026-07-02 9:55 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 9:55 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: conor+dt, imx, robh, Frank.Li, devicetree
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] DMA channels are permanently leaked during early probe failures and during module unbind due to a flawed PM runtime status check.
- [High] Missing `pm_runtime_disable()` in the `probe` function's error paths leads to an unbalanced and permanently enabled PM runtime state.
--
commit 79fa01b02ba17aabe215aeb8794e92dac90f80ad
Author: Vaishnav Achath <vaishnav.a@ti.com>
arm64: dts: ti: k3-j721s2-main: Add multiple channels for CSI2RX DMA
J721E CSI2RX SHIM layer can support up to 32 DMA channel contexts. Add
additional DMA channels to enable multistream support for CSI2RX.
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 5cac119e4292a..f4b8713873b17 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -1239,8 +1239,11 @@ ti_csi2rx0: ticsi2rx@4500000 {
> ranges;
> #address-cells = <2>;
> #size-cells = <2>;
> - dmas = <&main_bcdma_csi 0 0x4940 0>;
> - dma-names = "rx0";
> + dmas = <&main_bcdma_csi 0 0x4940 0>, <&main_bcdma_csi 0 0x4941 0>,
> + <&main_bcdma_csi 0 0x4942 0>, <&main_bcdma_csi 0 0x4943 0>,
> + <&main_bcdma_csi 0 0x4944 0>, <&main_bcdma_csi 0 0x4945 0>,
> + <&main_bcdma_csi 0 0x4946 0>, <&main_bcdma_csi 0 0x4947 0>;
> + dma-names = "rx0", "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7";
[Severity: High]
This isn't a bug introduced by this patch, but increasing the channel
allocations from 1 to 8 will exhaust the system's DMA engine much faster due
to an existing channel leak in the driver.
During an early probe failure before pm_runtime_set_active() is called, the
device status defaults to RPM_SUSPENDED.
In drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c:ti_csi2rx_cleanup_ctx(),
the driver checks this status:
if (!pm_runtime_status_suspended(ctx->csi->dev))
dma_release_channel(ctx->dma.chan);
Because the status is already suspended, it wrongly assumes the channels were
freed by a suspend callback and skips releasing them.
This same leak also happens on module unbind. In ti_csi2rx_remove(), if the
device is active, the driver forces the state to suspended without disabling PM
runtime first:
if (!pm_runtime_status_suspended(&pdev->dev))
pm_runtime_set_suspended(&pdev->dev);
This alters the status without invoking the runtime_suspend callback that would
normally free the channels. Does it make sense to fix this PM state handling
so these newly added DMA channels aren't permanently leaked?
[Severity: High]
This is a pre-existing issue, but there is also a missing pm_runtime_disable()
in the probe error path that could cause PM state tracking issues when this
node fails to probe.
If ti_csi2rx_notifier_register() or devm_of_platform_populate() fails, the code
jumps to err_ctx:
drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c:ti_csi2rx_probe() {
...
err_ctx:
while (i--)
ti_csi2rx_cleanup_ctx(&csi->ctx[i]);
ti_csi2rx_cleanup_v4l2(csi);
err_dma_chan:
...
}
This error path misses a call to pm_runtime_disable(), leaving the PM runtime
disable_depth unbalanced. When a subsequent probe attempt calls
pm_runtime_enable() again, could the disable_depth underflow and break power
management for the device?
> power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=3
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 17/18] arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer
2026-07-02 9:31 ` [PATCH 17/18] arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer Yemike Abhilash Chandra
@ 2026-07-02 10:04 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-02 10:04 UTC (permalink / raw)
To: Yemike Abhilash Chandra; +Cc: imx, conor+dt, robh, devicetree, Frank.Li
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] The device tree overlay extends `port@0` of the deserializer but fails to override its `status = "disabled"` property to `"okay"`.
- [Medium] The Makefile edits replace the generic V3Link fusion board DTB targets with camera-specific IMX219 targets, removing the ability to build the base fusion board device tree.
- [Medium] Fixed regulators for the IMX219 sensor are defined in the root node with generic names, which will cause collisions if multiple cameras are connected.
- [Low] The clock node name `imx219-xclk-00` does not conform to the `fixed-clock` binding schema.
--
commit a4f2bcb00cd6e7f16649b1b005247013f5bca8a0
Author: Jianzhong Xu <xuj@ti.com>
arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer
Arducam V3Link camera solution is shipped with an UB953 serializer
and an IMX219 sensor. Add an overlay for interfacing the UB953 serilaizer
and IMX219 sensor with the RX0 port on the UB960 deserializer.
Link: https://docs.arducam.com/V3Link-Camera-Solution/V3Link-Camera-Solution-on-TI-Platform/Introduction/
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 824acb0d8ee3c..c8e29fdbe37f5 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
[ ... ]
> @@ -318,16 +321,18 @@ k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \
> k3-am68-sk-base-board-pcie1-ep.dtbo
> k3-am68-sk-fpdlink-fusion-dtbs := k3-am68-sk-base-board.dtb \
> k3-j721e-sk-fpdlink-fusion.dtbo
> -k3-am68-sk-v3link-fusion-dtbs := k3-am68-sk-base-board.dtb \
> - k3-am68-sk-v3link-fusion.dtbo
> +k3-am68-sk-v3link-fusion-imx219-dtbs := k3-am68-sk-base-board.dtb \
> + k3-am68-sk-v3link-fusion.dtbo \
> + k3-v3link-imx219-0-0.dtbo
[Severity: Medium]
Does replacing these generic V3Link fusion board DTB targets instead of
appending new ones break the ability to build the base fusion board device
tree?
It appears users relying on the generic fusion board DTB to attach different
types of camera modules will no longer have those generic targets generated.
[ ... ]
> diff --git a/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso b/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
> new file mode 100644
> index 0000000000000..049438f9fc898
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-v3link-imx219-0-0.dtso
> @@ -0,0 +1,127 @@
[ ... ]
> +&{/} {
> + clk_imx219_fixed_00: imx219-xclk-00 {
[Severity: Low]
Does the node name imx219-xclk-00 conform to the fixed-clock binding schema?
It looks like this might trigger a dtbs_check warning and should perhaps be
named clock-imx219-00 instead.
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24000000>;
> + };
> +
> + reg_2p8v: regulator-2p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P8V";
[Severity: Medium]
Will these generic regulator node and string names cause collisions if multiple
cameras are connected?
If another similar overlay is applied for a second port, would it merge the
identical node names or fail to register due to a duplicate regulator-name?
Could these include port-specific suffixes like regulator-imx219-0-0-2p8v?
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + regulator-always-on;
> + };
[ ... ]
> +&deserializer_0_ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* FPDLink RX 0 */
> + port@0 {
> + reg = <0>;
> +
> + ub960_fpd3_1_in: endpoint {
> + remote-endpoint = <&ub953_1_out>;
> + };
> + };
[Severity: High]
Does this port@0 extension need to include a status = "okay" property?
If the base board overlay k3-am68-sk-v3link-fusion.dtso initialized port@0
with status = "disabled", would the OF graph API skip endpoints because the
parent port remains disabled in the final DTB?
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702093123.1048575-1-y-abhilashchandra@ti.com?part=17
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 18/18] arm64: defconfig: Enable DS90UB960 deserializer and DS90UB953 serializer
2026-07-02 9:31 ` [PATCH 18/18] arm64: defconfig: Enable DS90UB960 deserializer and DS90UB953 serializer Yemike Abhilash Chandra
@ 2026-07-02 10:54 ` Krzysztof Kozlowski
0 siblings, 0 replies; 29+ messages in thread
From: Krzysztof Kozlowski @ 2026-07-02 10:54 UTC (permalink / raw)
To: Yemike Abhilash Chandra, nm, vigneshr, kristo, robh, krzk+dt,
conor+dt
Cc: Frank.Li, s.hauer, kernel, festevam, andersson, geert,
dmitry.baryshkov, arnd, ebiggers, luca.weiss, michal.simek, sven,
linux-arm-kernel, devicetree, linux-kernel, imx, r-donadkar,
devarsht, u-kumar1
On 02/07/2026 11:31, Yemike Abhilash Chandra wrote:
> Enable building Texas Instruments DS90UB960 deserializer and
> DS90UB953 serializer drivers as modules.
Standard question: why... Use lore.kernel.org for past discussions.
Best regards,
Krzysztof
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2026-07-02 9:31 [PATCH 00/18] Add DT support for CSI2RX multi-stream Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 01/18] arm64: dts: ti: k3-{j721e/j721s2}-main: Fix indentation in CSI2RX node Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 02/18] arm64: dts: ti: k3-j721e-main: Add multiple channels for CSI2RX DMA Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 03/18] arm64: dts: ti: k3-j721s2-main: " Yemike Abhilash Chandra
2026-07-02 9:55 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 04/18] arm64: dts: ti: k3-j784s4-j742s2-main-common: " Yemike Abhilash Chandra
2026-07-02 9:46 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 05/18] arm64: dts: ti: k3-am62p-j722s: " Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 06/18] arm64: dts: ti: k3-j722s-main: " Yemike Abhilash Chandra
2026-07-02 9:47 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 07/18] arm64: dts: ti: k3-j721e: Add overlay for fusion application daughter board Yemike Abhilash Chandra
2026-07-02 9:47 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 08/18] arm64: dts: ti: k3-j721s2: " Yemike Abhilash Chandra
2026-07-02 9:45 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 09/18] arm64: dts: ti: k3-j721e-sk: " Yemike Abhilash Chandra
2026-07-02 9:50 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 10/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
2026-07-02 9:48 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 11/18] arm64: dts: ti: k3-am68-sk: Add overlay for dual Arducam V3link fusion Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 12/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 13/18] arm64: dts: ti: k3-j784s4-evm: Add overlay for J7EXPA01EVM Fusion2 Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 14/18] arm64: dts: ti: k3-j722s-evm: " Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 15/18] arm64: dts: ti: k3-j721s2: Add overlay for DS90UB954-Q1EVM Yemike Abhilash Chandra
2026-07-02 9:55 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 16/18] arm64: dts: ti: k3-j721e: " Yemike Abhilash Chandra
2026-07-02 9:31 ` [PATCH 17/18] arm64: dts: ti: k3-v3link: Add overlay for IMX219+UB953 serializer Yemike Abhilash Chandra
2026-07-02 10:04 ` sashiko-bot
2026-07-02 9:31 ` [PATCH 18/18] arm64: defconfig: Enable DS90UB960 deserializer and DS90UB953 serializer Yemike Abhilash Chandra
2026-07-02 10:54 ` Krzysztof Kozlowski
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