From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Manasi Navare <manasi.d.navare@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Anusha Srivatsa <anusha.srivatsa@intel.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v6 22/28] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
Date: Wed, 31 Oct 2018 15:09:37 +0200 [thread overview]
Message-ID: <20181031130937.GO9144@intel.com> (raw)
In-Reply-To: <20181030234535.GB3481@intel.com>
On Tue, Oct 30, 2018 at 04:45:35PM -0700, Manasi Navare wrote:
> On Thu, Oct 25, 2018 at 05:09:42PM +0300, Ville Syrjälä wrote:
> > On Wed, Oct 24, 2018 at 03:28:34PM -0700, Manasi Navare wrote:
> > > DSC PPS secondary data packet infoframes are filled with
> > > DSC picure parameter set metadata according to the DSC standard.
> > > These infoframes are sent to the sink device and used during DSC
> > > decoding.
> > >
> > > v2:
> > > * Rebase ond drm-tip
> > >
> > > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > > Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_vdsc.c | 21 +++++++++++++++++++++
> > > 1 file changed, 21 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915/intel_vdsc.c
> > > index b0fc716bbbfd..4b4b812d68f3 100644
> > > --- a/drivers/gpu/drm/i915/intel_vdsc.c
> > > +++ b/drivers/gpu/drm/i915/intel_vdsc.c
> > > @@ -988,6 +988,25 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
> > > }
> > > }
> > >
> > > +static void intel_dp_send_dsc_pps_sdp(struct intel_encoder *encoder,
> > > + struct intel_crtc_state *crtc_state)
> >
> > const crtc_state
>
> Changing this to const crtc_state started giving me an error when I get the
> struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg;
const struct drm_dsc_config ...
>
> So this is making me think that since dp_dsc_cfg is written during compute_config,
> and there on we just read it, we dont need to pass *vdsc_cfg , we can
> just pass the struct directly right?
Not sure what you're asking here.
>
> Manasi
>
> >
> > s/send/write/ ?
> >
> > > +{
> > > + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> > > + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> > > + struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg;
> > > + struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;
> > > +
> > > + /* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */
> > > + drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp);
> > > +
> > > + /* Fill the PPS payload bytes as per DSC spec 1.2 Table 4-1 */
> > > + drm_dsc_pps_infoframe_pack(&dp_dsc_pps_sdp, vdsc_cfg);
> > > +
> > > + intel_dig_port->write_infoframe(encoder, crtc_state,
> > > + DP_SDP_PPS, &dp_dsc_pps_sdp,
> > > + sizeof(dp_dsc_pps_sdp));
> > > +}
> > > +
> > > void intel_dsc_enable(struct intel_encoder *encoder,
> > > struct intel_crtc_state *crtc_state)
> > > {
> > > @@ -997,5 +1016,7 @@ void intel_dsc_enable(struct intel_encoder *encoder,
> > >
> > > intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
> > >
> > > + intel_dp_send_dsc_pps_sdp(encoder, crtc_state);
> > > +
> > > return;
> > > }
> > > --
> > > 2.18.0
> >
> > --
> > Ville Syrjälä
> > Intel
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Ville Syrjälä
Intel
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dri-devel mailing list
dri-devel@lists.freedesktop.org
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next prev parent reply other threads:[~2018-10-31 13:09 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-24 22:28 [PATCH v6 00/28] Display Stream Compression enabling on eDP/DP Manasi Navare
2018-10-24 22:28 ` [PATCH v6 01/28] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming Manasi Navare
2018-10-24 22:28 ` [PATCH v6 02/28] drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT Manasi Navare
2018-10-24 22:28 ` [PATCH v6 03/28] drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init Manasi Navare
2018-10-24 22:28 ` [PATCH v6 04/28] drm/dp: DRM DP helper/macros to get DP sink DSC parameters Manasi Navare
2018-12-19 18:54 ` [Intel-gfx] " Daniel Vetter
2019-01-30 11:06 ` Daniel Vetter
2019-01-30 18:06 ` Sean Paul
2019-01-30 18:27 ` Manasi Navare
2019-01-30 18:26 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 05/28] drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC Manasi Navare
2018-10-24 22:28 ` [PATCH v6 06/28] drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported Manasi Navare
2018-10-24 22:28 ` [PATCH v6 07/28] drm/dp: Define payload size for DP SDP PPS packet Manasi Navare
2018-10-24 22:28 ` [PATCH v6 08/28] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-01 16:42 ` Ville Syrjälä
2018-11-01 16:53 ` Ville Syrjälä
2018-11-01 21:48 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 09/28] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-10-24 22:28 ` [PATCH v6 10/28] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-10-24 22:28 ` [PATCH v6 11/28] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-01 16:46 ` Ville Syrjälä
2018-11-01 23:54 ` Manasi Navare
2018-11-02 0:23 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 12/28] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-10-30 23:53 ` Manasi Navare
2018-10-31 13:10 ` Ville Syrjälä
2018-10-31 16:05 ` Manasi Navare
2018-10-31 16:13 ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 13/28] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-10-29 20:30 ` Ville Syrjälä
2018-10-29 20:34 ` Ville Syrjälä
2018-10-29 23:08 ` Manasi Navare
2018-10-30 11:46 ` Ville Syrjälä
2018-10-29 21:42 ` Manasi Navare
2018-10-29 22:12 ` Manasi Navare
2018-10-30 11:41 ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 14/28] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-10-24 22:28 ` [PATCH v6 15/28] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-10-24 22:28 ` [PATCH v6 16/28] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-10-24 22:28 ` [PATCH v6 17/28] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-10-24 22:28 ` [PATCH v6 18/28] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-10-25 14:03 ` Ville Syrjälä
2018-10-25 20:11 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-10-24 22:28 ` [PATCH v6 20/28] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-10-24 22:28 ` [PATCH v6 21/28] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-10-25 14:08 ` Ville Syrjälä
2018-10-29 19:24 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 22/28] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-10-25 14:09 ` Ville Syrjälä
2018-10-25 20:07 ` Manasi Navare
2018-10-30 23:45 ` Manasi Navare
2018-10-31 13:09 ` Ville Syrjälä [this message]
2018-10-24 22:28 ` [PATCH v6 23/28] drm/i915/icl: Add Display Stream Splitter control registers Manasi Navare
2018-10-24 22:28 ` [PATCH v6 24/28] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-10-25 14:15 ` Ville Syrjälä
2018-10-25 20:05 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 25/28] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-10-25 14:16 ` Ville Syrjälä
2018-10-25 19:55 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 26/28] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-10-25 14:22 ` Ville Syrjälä
2018-10-25 19:41 ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 27/28] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable Manasi Navare
2018-10-24 22:28 ` Lyude Paul
2018-10-25 20:12 ` Manasi Navare
2018-10-29 20:39 ` Ville Syrjälä
2018-10-29 21:35 ` Manasi Navare
2018-10-30 11:26 ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 28/28] drm/i915/dsc: Force DSC enable if requested by IGT/userspace Manasi Navare
2018-10-24 22:39 ` ✗ Fi.CI.CHECKPATCH: warning for Display Stream Compression enabling on eDP/DP (rev6) Patchwork
2018-10-24 22:50 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-24 23:02 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-31 23:36 ` [PATCH v6 00/28] Display Stream Compression enabling on eDP/DP Manasi Navare
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