[PATCH 2/6] arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge

[PATCH 2/6] arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge

[ShiTou Hong]

From: redstonee <1516235445@qq.com>

The sm8250-hdk has a video bridge chip LT9611UXC convertng MIPI DSI to HDMI.

Enable the i2c port of the chip, the display controller and DSI port.
Add the pinctrl of LT9611UXC's rst&irq pins.

Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
---
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 123 ++++++++++++++++++++++++
 1 file changed, 123 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
index 5975878ea..d92e569d8 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
@@ -44,6 +44,18 @@ vreg_s4a_1p8: pm8150-s4 {
 		vin-supply = <&vph_pwr>;
 	};
 
+	lt9611_1v2: lt9611-vdd12-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "LT9611_1V2";
+
+		regulator-always-on;
+		regulator-boot-on;
+
+		vin-supply = <&vph_pwr>;
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+	};
+
 	vreg_s6c_0p88: smpc6-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vreg_s6c_0p88";
@@ -63,6 +75,17 @@ key-vol-up {
 			gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>;
 		};
 	};
+
+	hdmi-connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&lt9611_out>;
+			};
+		};
+	};
 };
 
 &apps_rsc {
@@ -396,6 +419,10 @@ &qupv3_id_1 {
 	status = "okay";
 };
 
+&qupv3_id_0 {
+	status = "okay";
+};
+
 &tlmm {
 	gpio-reserved-ranges = <28 4>, <40 4>;
 
@@ -404,6 +431,20 @@ sd_ufs_cd_pins: sd-ufs-cd-pins {
 		function = "gpio";
 		bias-pull-up;
 	};
+
+	lt9611_pins: lt9611-pins {
+		irq-pins {
+			pins = "gpio1";
+			function = "gpio";
+			bias-disable;
+		};
+
+		rst-pins {
+			pins = "gpio2";
+			function = "gpio";
+			output-high;
+		};
+	};
 };
 
 &uart12 {
@@ -486,3 +527,85 @@ &sdhc_2 {
 	pinctrl-0 = <&sdc2_default_state>, <&sd_ufs_cd_pins>;
 	pinctrl-1 = <&sdc2_sleep_state>, <&sd_ufs_cd_pins>;
 };
+
+&adsp {
+	status = "okay";
+	firmware-name = "qcom/sm8250/adsp.mbn";
+};
+
+&cdsp {
+	status = "okay";
+	firmware-name = "qcom/sm8250/cdsp.mbn";
+};
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	lt9611_codec: hdmi-bridge@2b {
+		compatible = "lontium,lt9611uxc";
+		reg = <0x2b>;
+		#sound-dai-cells = <1>;
+
+		interrupts-extended = <&tlmm 1 IRQ_TYPE_EDGE_FALLING>;
+		reset-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+
+		vdd-supply = <&lt9611_1v2>;
+		vcc-supply = <&vreg_bob>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&lt9611_pins>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				lt9611_a: endpoint {
+					remote-endpoint = <&mdss_dsi0_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				lt9611_out: endpoint {
+					remote-endpoint = <&hdmi_con>;
+				};
+			};
+		};
+	};
+};
+
+&gpi_dma0 {
+	status = "okay";
+};
+
+&mdss {
+	status = "okay";
+};
+
+&mdss_dp {
+	status = "okay";
+};
+
+&mdss_dp_out {
+	data-lanes = <0 1>;
+};
+
+&mdss_dsi0 {
+	status = "okay";
+	vdda-supply = <&vreg_l9a_1p2>;
+};
+
+&mdss_dsi0_out {
+	remote-endpoint = <&lt9611_a>;
+	data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+	status = "okay";
+	vdds-supply = <&vreg_l5a_0p88>;
+};
-- 
2.47.3

Re: [PATCH 2/6] arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] arm64: dts: qcom: sm8250-hdk: pinctrl node lt9611-pins violates -state schema
- [Medium] arm64: dts: qcom: sm8250-hdk: unlinked mdss_dp and unrelated adsp/cdsp nodes
--

commit b1dadd1c8b42a901f8e62f9b3d2367c950faf2f4
Author: redstonee <1516235445@qq.com>

arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge

This commit enables the LT9611UXC MIPI DSI-to-HDMI bridge on the SM8250 HDK
along with its regulator, HDMI connector, I2C bus, pinctrl state, and MDSS/DSI
nodes, as well as the ADSP, CDSP, and DisplayPort controller nodes.

> diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> index 5975878ea0fd2..d92e569d87410 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts

[ ... ]

> @@ -404,6 +431,20 @@ sd_ufs_cd_pins: sd-ufs-cd-pins {
>  		function = "gpio";
>  		bias-pull-up;
>  	};
> +
> +	lt9611_pins: lt9611-pins {
> +		irq-pins {
> +			pins = "gpio1";
> +			function = "gpio";
> +			bias-disable;
> +		};
> +
> +		rst-pins {
> +			pins = "gpio2";
> +			function = "gpio";
> +			output-high;
> +		};
> +	};
>  };
>  
>  &uart12 {

[Severity: Medium]
Should the lt9611-pins node under &tlmm (as well as sd-ufs-cd-pins from the
preceding commit) be named with a -state suffix, such as lt9611-default-state
or lt9611-state?

In arch/arm64/boot/dts/qcom/sm8250.dtsi, tlmm uses the qcom,sm8250-pinctrl
compatible string. The binding in
Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml sets
unevaluatedProperties: false and restricts top-level pin configuration child
nodes to names ending in -state, while -pins is only matched for subnodes
nested inside a -state parent node:

patternProperties:
  "-state$":
    oneOf:
      - $ref: "#/$defs/qcom-sm8250-tlmm-state"
      - patternProperties:
          "-pins$":
            $ref: "#/$defs/qcom-sm8250-tlmm-state"
        additionalProperties: false

Naming the top-level child node lt9611-pins causes dtbs_check to fail on
&tlmm and skips validation of the nested irq-pins and rst-pins subnodes.

> @@ -486,3 +527,85 @@ &sdhc_2 {
>  	pinctrl-0 = <&sdc2_default_state>, <&sd_ufs_cd_pins>;
>  	pinctrl-1 = <&sdc2_sleep_state>, <&sd_ufs_cd_pins>;
>  };
> +
> +&adsp {
> +	status = "okay";
> +	firmware-name = "qcom/sm8250/adsp.mbn";
> +};
> +
> +&cdsp {
> +	status = "okay";
> +	firmware-name = "qcom/sm8250/cdsp.mbn";
> +};

[ ... ]

> +&mdss {
> +	status = "okay";
> +};
> +
> +&mdss_dp {
> +	status = "okay";
> +};
> +
> +&mdss_dp_out {
> +	data-lanes = <0 1>;
> +};

[Severity: Medium]
Were &adsp, &cdsp, &mdss_dp, and &mdss_dp_out intended to be included in this
LT9611UXC HDMI bridge patch?

The &adsp and &cdsp remoteproc nodes are unrelated to the MIPI DSI-to-HDMI
bridge and are not mentioned in the commit description.

Additionally, enabling &mdss_dp here before connecting &mdss_dp_out to
usb_1_qmpphy_dp_in (which happens in the follow-up USB-C patch "arm64: dts:
qcom: sm8250-hdk: Add FSA4480 USB-C protocol chip") leaves port@1 of mdss_dp
without a remote-endpoint:

arch/arm64/boot/dts/qcom/sm8250.dtsi:
    port@1 {
        reg = <1>;

        mdss_dp_out: endpoint {
        };
    };

Because add_mdp_components() in drivers/gpu/drm/msm/msm_drv.c skips disabled
interfaces via of_device_is_available(intf), &mdss and &mdss_dsi0 do not
require &mdss_dp to be enabled for the HDMI bridge. When &mdss_dp probes
without a remote-endpoint on port@1, msm_dp_display_probe_tail() in
drivers/gpu/drm/msm/dp/dp_display.c sets dp->next_bridge = NULL instead of
attaching the QMP PHY AUX and Type-C HPD bridges:

    dp->next_bridge = devm_drm_of_get_bridge(&dp->pdev->dev, dp->pdev->dev.of_node, 1, 0);
    if (IS_ERR(dp->next_bridge)) {
        ret = PTR_ERR(dp->next_bridge);
        dp->next_bridge = NULL;
        if (dp->is_edp || ret != -ENODEV)
            return ret;
    }

drm_bridge_connector_init() then falls back to msm_dp_bridge as the HPD
provider and calls msm_dp_bridge_hpd_enable(), which calls
pm_runtime_resume_and_get() and enables internal HPD via
msm_dp_aux_hpd_enable(), keeping the DP controller and RPMHPD_MMCX power
domain permanently resumed.

Should &mdss_dp and &mdss_dp_out be moved to the follow-up USB-C patch where
the DisplayPort graph is connected, and &adsp and &cdsp be split into a
separate commit?

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261022113601.2320940-1-dc_redstone@outlook.com?part=2

[PATCH 1/6] arm64: dts: qcom: sm8250-hdk: Enable the sdhc_2 port

[ShiTou Hong]

The sm8250-hdk has an on-board SD/UFS card slot,
but the SDHCI port hasn't been enabled in the dts,
so we can't use it after booting.

Enable the dts node of SDHCI for the on-board SD card slot.
Add the pinctrl node of the SD card pins.

Co-developed-by: KancyJoe <kancy2333@outlook.com>
Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
---
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 39 +++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
index c1c673086..a049d78f5 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
@@ -398,6 +398,32 @@ &qupv3_id_1 {
 
 &tlmm {
 	gpio-reserved-ranges = <28 4>, <40 4>;
+
+	sd_ufs_cd_pins: sd-ufs-cd-default-state {
+		pins = "gpio77";
+		function = "gpio";
+		bias-pull-up;
+	};
+
+	sdc2_default: sdc2-default-state {
+		cmd-pins {
+			pins = "sdc2_cmd";
+			bias-pull-up;
+			drive-strength = <10>;
+		};
+
+		data-pins {
+			pins = "sdc2_data";
+			bias-pull-up;
+			drive-strength = <10>;
+		};
+
+		clk-pins {
+			pins = "sdc2_clk";
+			bias-disable;
+			drive-strength = <16>;
+		};
+	};
 };
 
 &uart12 {
@@ -467,3 +493,16 @@ &usb_2_dwc3 {
 &venus {
 	status = "okay";
 };
+
+&sdhc_2 {
+	status = "okay";
+
+	cd-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
+
+	vmmc-supply = <&vreg_l9c_2p96>;
+	vqmmc-supply = <&vreg_l6c_2p96>;
+
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&sdc2_default>, <&sd_ufs_cd_pins>;
+	pinctrl-1 = <&sdc2_sleep_state>, <&sd_ufs_cd_pins>;
+};
-- 
2.47.3

[PATCH 2/6] arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge

[ShiTou Hong]

The sm8250-hdk has a video bridge chip LT9611UXC
converting MIPI DSI to HDMI, which hasn't been added
in the dts, so we have no HDMI signal.

Add the 1V2 supply node for the chip and the HDMI connector node.
Enable the i2c port of the chip, the display controller and DSI port.
Add the pinctrl of LT9611UXC's RST and IRQ pins.

Co-developed-by: KancyJoe <kancy2333@outlook.com>
Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
---
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 105 ++++++++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
index a049d78f5..0bc946682 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
@@ -44,6 +44,18 @@ vreg_s4a_1p8: pm8150-s4 {
 		vin-supply = <&vph_pwr>;
 	};
 
+	lt9611_1v2: lt9611-vdd12-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "LT9611_1V2";
+
+		regulator-always-on;
+		regulator-boot-on;
+
+		vin-supply = <&vph_pwr>;
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+	};
+
 	vreg_s6c_0p88: smpc6-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vreg_s6c_0p88";
@@ -63,6 +75,17 @@ key-vol-up {
 			gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>;
 		};
 	};
+
+	hdmi-connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&lt9611_out>;
+			};
+		};
+	};
 };
 
 &apps_rsc {
@@ -396,6 +419,10 @@ &qupv3_id_1 {
 	status = "okay";
 };
 
+&qupv3_id_0 {
+	status = "okay";
+};
+
 &tlmm {
 	gpio-reserved-ranges = <28 4>, <40 4>;
 
@@ -424,6 +451,20 @@ clk-pins {
 			drive-strength = <16>;
 		};
 	};
+
+	lt9611_pins: lt9611-default-state {
+		irq-pins {
+			pins = "gpio1";
+			function = "gpio";
+			bias-disable;
+		};
+
+		rst-pins {
+			pins = "gpio2";
+			function = "gpio";
+			output-high;
+		};
+	};
 };
 
 &uart12 {
@@ -506,3 +547,67 @@ &sdhc_2 {
 	pinctrl-0 = <&sdc2_default>, <&sd_ufs_cd_pins>;
 	pinctrl-1 = <&sdc2_sleep_state>, <&sd_ufs_cd_pins>;
 };
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	lt9611_codec: hdmi-bridge@2b {
+		compatible = "lontium,lt9611uxc";
+		reg = <0x2b>;
+		#sound-dai-cells = <1>;
+
+		interrupts-extended = <&tlmm 1 IRQ_TYPE_EDGE_FALLING>;
+		reset-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+
+		vdd-supply = <&lt9611_1v2>;
+		vcc-supply = <&vreg_bob>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&lt9611_pins>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				lt9611_a: endpoint {
+					remote-endpoint = <&mdss_dsi0_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				lt9611_out: endpoint {
+					remote-endpoint = <&hdmi_con>;
+				};
+			};
+		};
+	};
+};
+
+&gpi_dma0 {
+	status = "okay";
+};
+
+&mdss {
+	status = "okay";
+};
+
+&mdss_dsi0 {
+	status = "okay";
+	vdda-supply = <&vreg_l9a_1p2>;
+};
+
+&mdss_dsi0_out {
+	remote-endpoint = <&lt9611_a>;
+	data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+	status = "okay";
+	vdds-supply = <&vreg_l5a_0p88>;
+};
-- 
2.47.3

[PATCH 3/6] arm64: dts: qcom: sm8250-hdk: Add FSA4480 USB-C protocol chip

[ShiTou Hong]

The sm8250-hdk has a USB-C port supporting OTG and DP altmode.
This is implemented with the FSA4480 chip,
which hasn't been added in the dts file.

Change the USB controller mode to OTG.
Enable the i2c controller for the chip and the dp controller.
Configure the PM8150b type-c module and vbus regulator.

Co-developed-by: KancyJoe <kancy2333@outlook.com>
Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
---
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 113 +++++++++++++++++++++++-
 1 file changed, 112 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
index 0bc946682..7a2903941 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/usb/pd.h>
 #include "sm8250.dtsi"
 #include "pm8150.dtsi"
 #include "pm8150b.dtsi"
@@ -415,6 +416,10 @@ &pon_resin {
 	linux,code = <KEY_VOLUMEDOWN>;
 };
 
+&qupv3_id_2 {
+	status = "okay";
+};
+
 &qupv3_id_1 {
 	status = "okay";
 };
@@ -509,6 +514,10 @@ &usb_1_qmpphy {
 	vdda-pll-supply = <&vreg_l9a_1p2>;
 };
 
+&usb_1_qmpphy_out {
+	remote-endpoint = <&pm8150b_typec_mux_in>;
+};
+
 &usb_2_qmpphy {
 	status = "okay";
 	vdda-phy-supply = <&vreg_l18a_0p92>;
@@ -524,13 +533,18 @@ &usb_2 {
 };
 
 &usb_1_dwc3 {
-	dr_mode = "peripheral";
+	dr_mode = "otg";
+	usb-role-switch;
 };
 
 &usb_2_dwc3 {
 	dr_mode = "host";
 };
 
+&usb_1_dwc3_hs_out {
+	remote-endpoint = <&pm8150b_hs_in>;
+};
+
 &venus {
 	status = "okay";
 };
@@ -589,6 +603,28 @@ lt9611_out: endpoint {
 	};
 };
 
+&i2c15 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	fsa4480@43 {
+		compatible = "fcs,fsa4480";
+		reg = <0x43>;
+
+		interrupts-extended = <&tlmm 63 IRQ_TYPE_LEVEL_LOW>;
+
+		vcc-supply = <&vreg_bob>;
+		mode-switch;
+		orientation-switch;
+
+		port {
+			fsa4480_sbu_mux: endpoint {
+				remote-endpoint = <&pm8150b_typec_sbu_out>;
+			};
+		};
+	};
+};
+
 &gpi_dma0 {
 	status = "okay";
 };
@@ -597,6 +633,15 @@ &mdss {
 	status = "okay";
 };
 
+&mdss_dp {
+	status = "okay";
+};
+
+&mdss_dp_out {
+	data-lanes = <0 1>;
+	remote-endpoint = <&usb_1_qmpphy_dp_in>;
+};
+
 &mdss_dsi0 {
 	status = "okay";
 	vdda-supply = <&vreg_l9a_1p2>;
@@ -611,3 +656,69 @@ &mdss_dsi0_phy {
 	status = "okay";
 	vdds-supply = <&vreg_l5a_0p88>;
 };
+
+&pm8150b_vbus {
+	regulator-min-microamp = <500000>;
+	regulator-max-microamp = <3000000>;
+	status = "okay";
+};
+
+&pm8150b_typec {
+	status = "okay";
+
+	vdd-pdphy-supply = <&vreg_l2a_3p1>;
+
+	connector {
+		compatible = "usb-c-connector";
+
+		power-role = "source";
+		data-role = "dual";
+		self-powered;
+
+		vbus-supply = <&pm8150b_vbus>;
+
+		source-pdos = <PDO_FIXED(5000, 3000,PDO_FIXED_DUAL_ROLE |
+					 PDO_FIXED_USB_COMM |
+					 PDO_FIXED_DATA_SWAP)>;
+
+		altmodes {
+			displayport {
+				svid = /bits/ 16 <0xff01>;
+				vdo = <0x00001c46>;
+			};
+		};
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				pm8150b_hs_in: endpoint {
+					remote-endpoint = <&usb_1_dwc3_hs_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				pm8150b_typec_mux_in: endpoint {
+					remote-endpoint = <&usb_1_qmpphy_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				pm8150b_typec_sbu_out: endpoint {
+					remote-endpoint = <&fsa4480_sbu_mux>;
+				};
+			};
+		};
+	};
+};
+
+&usb_1_qmpphy_dp_in {
+	remote-endpoint = <&mdss_dp_out>;
+};
-- 
2.47.3

[PATCH 4/6] arm64: dts: qcom: sm8250-hdk: Enable the PCIe ports

[ShiTou Hong]

The sm8250-hdk has 2 PCIe ports which are not enabled in the dts.
The pcie0 is for the on-board ath11k WiFi/BT module;
while the pcie2 is for the M.2 connector.

Add the 3V3 regulator node for pcie2.
Enable the 2 pcie controllers and phys.

Co-developed-by: KancyJoe <kancy2333@outlook.com>
Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
---
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 28 +++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
index 7a2903941..bd9b90fbc 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
@@ -57,6 +57,13 @@ lt9611_1v2: lt9611-vdd12-regulator {
 		regulator-max-microvolt = <1200000>;
 	};
 
+	vreg_3p3: vreg-3p3-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_3p3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
 	vreg_s6c_0p88: smpc6-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vreg_s6c_0p88";
@@ -722,3 +729,24 @@ pm8150b_typec_sbu_out: endpoint {
 &usb_1_qmpphy_dp_in {
 	remote-endpoint = <&mdss_dp_out>;
 };
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie0_phy {
+	vdda-phy-supply = <&vreg_l5a_0p88>;
+	vdda-pll-supply = <&vreg_l9a_1p2>;
+	status = "okay";
+};
+
+&pcie2 {
+	status = "okay";
+	vddpe-3v3-supply = <&vreg_3p3>;
+};
+
+&pcie2_phy {
+	vdda-phy-supply = <&vreg_l5a_0p88>;
+	vdda-pll-supply = <&vreg_l9a_1p2>;
+	status = "okay";
+};
-- 
2.47.3

[PATCH 5/6] arm64: dts: qcom: sm8250-hdk: Add support of QCA6390

[ShiTou Hong]

The sm8250-hdk has a QCA6390 WiFi/BT module which hasn't
been added in the dts file.

Enable the UART port of BT, add the bluetooth node.
Add the QCA6390 PMU node.
Add the wifi node of pcieport0.
Add the missing regulator node of PM8009 which is used by QCA6390.
Add the pinctrl of QCA6390 enable pins.

Co-developed-by: KancyJoe <kancy2333@outlook.com>
Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
---
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 118 ++++++++++++++++++++++++
 1 file changed, 118 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
index bd9b90fbc..57c282bdb 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
@@ -94,6 +94,67 @@ hdmi_con: endpoint {
 			};
 		};
 	};
+
+	qca6390-pmu {
+		compatible = "qcom,qca6390-pmu";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&qca6390_pins>;
+
+		vddaon-supply = <&vreg_s6a_0p95>;
+		vddpmu-supply = <&vreg_s2f_0p95>;
+		vddrfa0p95-supply = <&vreg_s2f_0p95>;
+		vddrfa1p3-supply = <&vreg_s8c_1p3>;
+		vddrfa1p9-supply = <&vreg_s5a_1p9>;
+		vddpcie1p3-supply = <&vreg_s8c_1p3>;
+		vddpcie1p9-supply = <&vreg_s5a_1p9>;
+		vddio-supply = <&vreg_s4a_1p8>;
+
+		wlan-enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
+		bt-enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+
+		regulators {
+			vreg_pmu_rfa_cmn: ldo0 {
+				regulator-name = "vreg_pmu_rfa_cmn";
+			};
+
+			vreg_pmu_aon_0p59: ldo1 {
+				regulator-name = "vreg_pmu_aon_0p59";
+			};
+
+			vreg_pmu_wlcx_0p8: ldo2 {
+				regulator-name = "vreg_pmu_wlcx_0p8";
+			};
+
+			vreg_pmu_wlmx_0p85: ldo3 {
+				regulator-name = "vreg_pmu_wlmx_0p85";
+			};
+
+			vreg_pmu_btcmx_0p85: ldo4 {
+				regulator-name = "vreg_pmu_btcmx_0p85";
+			};
+
+			vreg_pmu_rfa_0p8: ldo5 {
+				regulator-name = "vreg_pmu_rfa_0p8";
+			};
+
+			vreg_pmu_rfa_1p2: ldo6 {
+				regulator-name = "vreg_pmu_rfa_1p2";
+			};
+
+			vreg_pmu_rfa_1p7: ldo7 {
+				regulator-name = "vreg_pmu_rfa_1p7";
+			};
+
+			vreg_pmu_pcie_0p9: ldo8 {
+				regulator-name = "vreg_pmu_pcie_0p9";
+			};
+
+			vreg_pmu_pcie_1p8: ldo9 {
+				regulator-name = "vreg_pmu_pcie_1p8";
+			};
+		};
+	};
 };
 
 &apps_rsc {
@@ -352,6 +413,13 @@ regulators-2 {
 		vdd-l5-l6-supply = <&vreg_bob>;
 		vdd-l7-supply = <&vreg_s4a_1p8>;
 
+		vreg_s2f_0p95: smps2 {
+			regulator-name = "vreg_s2f_0p95";
+			regulator-min-microvolt = <900000>;
+			regulator-max-microvolt = <952000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
+		};
+
 		vreg_l1f_cam_dvdd1_1p1: ldo1 {
 			regulator-name = "vreg_l1f_cam_dvdd1_1p1";
 			regulator-min-microvolt = <1104000>;
@@ -477,6 +545,39 @@ rst-pins {
 			output-high;
 		};
 	};
+
+	qca6390_pins: qca6390-default-state {
+		wlan-enable-pins {
+			pins = "gpio20";
+			function = "gpio";
+			drive-strength = <16>;
+			output-low;
+			bias-pull-up;
+		};
+
+		bt-enable-pins {
+			pins = "gpio21";
+			function = "gpio";
+			drive-strength = <16>;
+			output-low;
+			bias-pull-up;
+		};
+	};
+};
+
+&uart6 {
+	status = "okay";
+
+	bluetooth {
+		compatible = "qcom,qca6390-bt";
+
+		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
+		vddaon-supply = <&vreg_pmu_aon_0p59>;
+		vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
+		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+		vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
+	};
 };
 
 &uart12 {
@@ -740,6 +841,23 @@ &pcie0_phy {
 	status = "okay";
 };
 
+&pcieport0 {
+	wifi@0 {
+		compatible = "pci17cb,1101";
+		reg = <0x10000 0x0 0x0 0x0 0x0>;
+
+		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
+		vddaon-supply = <&vreg_pmu_aon_0p59>;
+		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
+		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
+		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+		vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
+		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
+		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
+	};
+};
+
 &pcie2 {
 	status = "okay";
 	vddpe-3v3-supply = <&vreg_3p3>;
-- 
2.47.3

[PATCH 6/6] arm64: dts: qcom: sm8250-hdk: Add PM8150b LEDs

[ShiTou Hong]

There are 2 LEDs controlled by PM8150b on sm8250-hdk
which are not added in the dts file.
The LED1 is for heartbeat indicator,
the LED2 is for wifi activity.

Enable the LED controller of PM8150b,
add the LED nodes with proper triggers into it.

Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
---
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
index 57c282bdb..e321fe9c1 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
@@ -7,6 +7,7 @@
 
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 #include <dt-bindings/usb/pd.h>
+#include <dt-bindings/leds/common.h>
 #include "sm8250.dtsi"
 #include "pm8150.dtsi"
 #include "pm8150b.dtsi"
@@ -157,6 +158,24 @@ vreg_pmu_pcie_1p8: ldo9 {
 	};
 };
 
+&pm8150b_lpg {
+	status = "okay";
+
+	led@1 {
+		reg = <1>;
+		function = LED_FUNCTION_HEARTBEAT;
+		linux,default-trigger = "heartbeat";
+		color = <LED_COLOR_ID_GREEN>;
+	};
+
+	led@2 {
+		reg = <2>;
+		function = LED_FUNCTION_WLAN;
+		linux,default-trigger = "phy0tx";
+		color = <LED_COLOR_ID_RED>;
+	};
+};
+
 &apps_rsc {
 	regulators-0 {
 		compatible = "qcom,pm8150-rpmh-regulators";
-- 
2.47.3

Re: [PATCH 4/6] arm64: dts: qcom: sm8250-hdk: Enable the PCIe ports

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] arm64: dts: qcom: missing Co-developed-by sign-off and From email mismatch
--

commit 330aa236347071fbfcbc8b5b9c4e5d1913e72fce
Author: ShiTou Hong <redstone.dcity@gmail.com>

arm64: dts: qcom: sm8250-hdk: Enable the PCIe ports

This commit adds the 3V3 fixed regulator node for pcie2 and enables the pcie0
and pcie2 controllers and their PHYs on the sm8250-hdk board.

>     arm64: dts: qcom: sm8250-hdk: Enable the PCIe ports
>
>     The sm8250-hdk has 2 PCIe ports which are not enabled in the dts.
>     The pcie0 is for the on-board ath11k WiFi/BT module;
>     while the pcie2 is for the M.2 connector.
>
>     Add the 3V3 regulator node for pcie2.
>     Enable the 2 pcie controllers and phys.
>
>     Co-developed-by: KancyJoe <kancy2333@outlook.com>
>     Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>

[Severity: Low]
Per Documentation/process/submitting-patches.rst, every Co-developed-by: tag
denotes authorship and must be immediately followed by a matching
Signed-off-by: tag from the associated co-author:

  Since Co-developed-by: denotes authorship, every Co-developed-by: must be
  immediately followed by a Signed-off-by: of the associated co-author.

Should this include a Signed-off-by: tag for KancyJoe <kancy2333@outlook.com>
immediately following the Co-developed-by: line?

Also, the commit Author email address (redstone.dcity@gmail.com) does not
match the email address in the submitter's Signed-off-by: line
(dc_redstone@outlook.com). Should the Author header and Signed-off-by: tag
use matching email addresses?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261023072832.2642647-1-dc_redstone@outlook.com?part=4

Re: [PATCH 3/6] arm64: dts: qcom: sm8250-hdk: Add FSA4480 USB-C protocol chip

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] arm64: dts: qcom: missing co-author sign-off and mismatched author email
--

commit 1a1ede276cc0d97ceb67bad5a51673b00f7ce0c3
Author: ShiTou Hong <redstone.dcity@gmail.com>

arm64: dts: qcom: sm8250-hdk: Add FSA4480 USB-C protocol chip

This commit adds the FSA4480 USB-C switch node and configures the PM8150B
type-c module, USB OTG role switch, and DisplayPort altmode in
arch/arm64/boot/dts/qcom/sm8250-hdk.dts.

>     arm64: dts: qcom: sm8250-hdk: Add FSA4480 USB-C protocol chip
>
>     The sm8250-hdk has a USB-C port supporting OTG and DP altmode.
>     This is implemented with the FSA4480 chip,
>     which hasn't been added in the dts file.
>
>     Change the USB controller mode to OTG.
>     Enable the i2c controller for the chip and the dp controller.
>     Configure the PM8150b type-c module and vbus regulator.
>
>     Co-developed-by: KancyJoe <kancy2333@outlook.com>
>     Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>

[Severity: Low]
As documented in Documentation/process/submitting-patches.rst:

    Co-developed-by: denotes authorship, every Co-developed-by: must be immediately
    followed by a Signed-off-by: of the associated co-author.

Should the Co-developed-by tag for KancyJoe <kancy2333@outlook.com> be
immediately followed by a matching Signed-off-by tag from KancyJoe?

Also, the commit Author header uses redstone.dcity@gmail.com while the
Signed-off-by line uses dc_redstone@outlook.com. Should these two email
addresses match?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261023072832.2642647-1-dc_redstone@outlook.com?part=3

Re: [PATCH 1/6] arm64: dts: qcom: sm8250-hdk: Enable the sdhc_2 port

[Konrad Dybcio]

On 10/23/26 9:28 AM, ShiTou Hong wrote:
> The sm8250-hdk has an on-board SD/UFS card slot,
> but the SDHCI port hasn't been enabled in the dts,
> so we can't use it after booting.
> 
> Enable the dts node of SDHCI for the on-board SD card slot.
> Add the pinctrl node of the SD card pins.
> 
> Co-developed-by: KancyJoe <kancy2333@outlook.com>
> Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
> ---

[...]

> @@ -467,3 +493,16 @@ &usb_2_dwc3 {
>  &venus {
>  	status = "okay";
>  };
> +
> +&sdhc_2 {

Please keep label references sorted

Konrad

> +	status = "okay";
> +
> +	cd-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
> +
> +	vmmc-supply = <&vreg_l9c_2p96>;
> +	vqmmc-supply = <&vreg_l6c_2p96>;
> +
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&sdc2_default>, <&sd_ufs_cd_pins>;
> +	pinctrl-1 = <&sdc2_sleep_state>, <&sd_ufs_cd_pins>;
> +};

Re: [PATCH 2/6] arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge

[Konrad Dybcio]

On 10/23/26 9:28 AM, ShiTou Hong wrote:
> The sm8250-hdk has a video bridge chip LT9611UXC
> converting MIPI DSI to HDMI, which hasn't been added
> in the dts, so we have no HDMI signal.
> 
> Add the 1V2 supply node for the chip and the HDMI connector node.
> Enable the i2c port of the chip, the display controller and DSI port.
> Add the pinctrl of LT9611UXC's RST and IRQ pins.
> 
> Co-developed-by: KancyJoe <kancy2333@outlook.com>
> Signed-off-by: ShiTou Hong <dc_redstone@outlook.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 105 ++++++++++++++++++++++++
>  1 file changed, 105 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> index a049d78f5..0bc946682 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> @@ -44,6 +44,18 @@ vreg_s4a_1p8: pm8150-s4 {
>  		vin-supply = <&vph_pwr>;
>  	};
>  
> +	lt9611_1v2: lt9611-vdd12-regulator {

Please keep nodes in order:

https://docs.kernel.org/devicetree/bindings/dts-coding-style.html

This DT may need some love in this regard.. time flies, 8250 is now
apparently 7 years old..

[...]

> +&i2c1 {
> +	status = "okay";
> +	clock-frequency = <400000>;

Keep status as the last property, with an \n preceding it

> +
> +	lt9611_codec: hdmi-bridge@2b {
> +		compatible = "lontium,lt9611uxc";
> +		reg = <0x2b>;
> +		#sound-dai-cells = <1>;
> +
> +		interrupts-extended = <&tlmm 1 IRQ_TYPE_EDGE_FALLING>;
> +		reset-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
> +
> +		vdd-supply = <&lt9611_1v2>;
> +		vcc-supply = <&vreg_bob>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&lt9611_pins>;

property-n
property-names

in this order, please

Konrad

Re: [PATCH 5/6] arm64: dts: qcom: sm8250-hdk: Add support of QCA6390

[Konrad Dybcio]

On 10/23/26 9:28 AM, ShiTou Hong wrote:
> The sm8250-hdk has a QCA6390 WiFi/BT module which hasn't
> been added in the dts file.
> 
> Enable the UART port of BT, add the bluetooth node.
> Add the QCA6390 PMU node.
> Add the wifi node of pcieport0.
> Add the missing regulator node of PM8009 which is used by QCA6390.
> Add the pinctrl of QCA6390 enable pins.

Don't describe the diff, describe the problem

https://docs.kernel.org/process/submitting-patches.html#describe-your-changes

[...]

> +	qca6390_pins: qca6390-default-state {
> +		wlan-enable-pins {
> +			pins = "gpio20";
> +			function = "gpio";
> +			drive-strength = <16>;
> +			output-low;

Drop output-foo, the driver will take care of that

> +			bias-pull-up;
> +		};
> +
> +		bt-enable-pins {
> +			pins = "gpio21";
> +			function = "gpio";
> +			drive-strength = <16>;
> +			output-low;

likewise

Konrad