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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>,
	Dan Williams <dan.j.williams@intel.com>, <dave@stgolabs.net>,
	<alison.schofield@intel.com>, <ira.weiny@intel.com>,
	<rrichter@amd.com>, <ming.li@zohomail.com>
Subject: Re: [PATCH v2 01/10] cxl/region: Add decoder check to check_commit_order()
Date: Tue, 20 May 2025 12:14:15 +0100	[thread overview]
Message-ID: <20250520121415.000026db@huawei.com> (raw)
In-Reply-To: <20250507004310.3536991-2-dave.jiang@intel.com>

On Tue, 6 May 2025 17:43:01 -0700
Dave Jiang <dave.jiang@intel.com> wrote:

> check_commit_order() attempts to convert a device to a decoder without
> making sure the device is a decoder. So far this has been working due
> to pure luck. Issue discovered while doing deferred dport probing when
> child ports are now in the midst of decoders due to ordering change
> of child port additions. Add a check before attempting to do decoder
> conversion.
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Stands on it's own so maybe queue this up even if later patches
are still under discussion?

I'm keen to reduce what is floating around in a good state!

Jonathan

> ---
>  drivers/cxl/core/region.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index c3f4dc244df7..a91d4eb061e4 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -788,7 +788,12 @@ static size_t show_targetN(struct cxl_region *cxlr, char *buf, int pos)
>  
>  static int check_commit_order(struct device *dev, void *data)
>  {
> -	struct cxl_decoder *cxld = to_cxl_decoder(dev);
> +	struct cxl_decoder *cxld;
> +
> +	if (!is_switch_decoder(dev))
> +		return 0;
> +
> +	cxld = to_cxl_decoder(dev);
>  
>  	/*
>  	 * if port->commit_end is not the only free decoder, then out of
> 
> base-commit: 3c746d4821f507304b08789e3c7c151554fc2356


  parent reply	other threads:[~2025-05-20 11:14 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-07  0:43 [PATCH v2 00/10] cxl: Delay HB port and switch dport probing until endpoint dev probe Dave Jiang
2025-05-07  0:43 ` [PATCH v2 01/10] cxl/region: Add decoder check to check_commit_order() Dave Jiang
2025-05-08 19:54   ` Alison Schofield
2025-05-09  0:55   ` Li Ming
2025-05-13  4:46   ` Gregory Price
2025-05-20 11:14   ` Jonathan Cameron [this message]
2025-05-20 16:13     ` Dave Jiang
2025-05-07  0:43 ` [PATCH v2 02/10] cxl: Saperate out CXL dport->id vs actual dport hardware id Dave Jiang
2025-05-08 20:08   ` Alison Schofield
2025-05-15 16:35     ` Dave Jiang
2025-05-09  0:51   ` Li Ming
2025-05-15 16:33     ` Dave Jiang
2025-05-09  9:14   ` Alejandro Lucero Palau
2025-05-15 16:35     ` Dave Jiang
2025-05-13  5:04   ` Gregory Price
2025-05-15 16:38     ` Dave Jiang
2025-05-20 11:19   ` Jonathan Cameron
2025-05-07  0:43 ` [PATCH v2 03/10] cxl: Rename find_dport() to provide better function intent Dave Jiang
2025-05-09  0:55   ` Li Ming
2025-05-09  9:20   ` Alejandro Lucero Palau
2025-05-15 17:04     ` Dave Jiang
2025-05-19 16:33     ` Dave Jiang
2025-05-20 11:21       ` Jonathan Cameron
2025-05-13  5:07   ` Gregory Price
2025-05-07  0:43 ` [PATCH v2 04/10] cxl: Remove adding of port_num via devm_cxl_add_dport() Dave Jiang
2025-05-09  0:56   ` Li Ming
2025-05-13  5:13   ` Gregory Price
2025-05-20 11:23   ` Jonathan Cameron
2025-05-07  0:43 ` [PATCH v2 05/10] cxl: Defer hardware dport->port_id assignment and registers probing Dave Jiang
2025-05-08  4:50   ` Li Ming
2025-05-13 15:43   ` Gregory Price
2025-05-15 22:03     ` Dave Jiang
2025-05-20 11:26       ` Jonathan Cameron
2025-05-20 16:33         ` Dave Jiang
2025-05-20 12:27   ` Jonathan Cameron
2025-05-07  0:43 ` [PATCH v2 06/10] cxl/test: Add workaround for cxl_test for cxl_core calling mocked functions Dave Jiang
2025-05-20 12:31   ` Jonathan Cameron
2025-05-07  0:43 ` [PATCH v2 07/10] cxl: Change sslbis handler to only handle single dport Dave Jiang
2025-05-13 15:48   ` Gregory Price
2025-05-20 12:32   ` Jonathan Cameron
2025-05-20 21:53     ` Dave Jiang
2025-05-07  0:43 ` [PATCH v2 08/10] cxl: Add helper to detect top of CXL device topology Dave Jiang
2025-05-13 15:49   ` Gregory Price
2025-05-13 16:12     ` Dave Jiang
2025-05-15 17:03       ` Gregory Price
2025-05-16 15:47         ` Dave Jiang
2025-05-20 12:34   ` Jonathan Cameron
2025-05-20 21:55     ` Dave Jiang
2025-05-07  0:43 ` [PATCH v2 09/10] cxl: Create an xarray to tie a host bridge to the cxl_root Dave Jiang
2025-05-13 16:01   ` Gregory Price
2025-05-20 12:53   ` Jonathan Cameron
2025-05-07  0:43 ` [PATCH v2 10/10] cxl: Move enumeration of hostbridge ports to the memdev probe path Dave Jiang
2025-05-20 13:11   ` Jonathan Cameron
2025-05-20 21:59     ` Dave Jiang

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